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ASIC Digital Design, Sr Engineer

pin icon Bengaluru, Karnataka, India Apply Now
Category: Engineering Hire Type: Employee
Job ID 50587BR Date posted 06/04/2024
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars, Artificial Intelligence, The cloud, 5G, The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities, meet unique performance, power, and size requirements of their target applications and get differentiated products to market quickly with reduced risk.

Job role:
We are looking at Senior Verification engineer to work on functional verification of RTL based IP Cores implementing complex protocols. The candidate will be part of the Solutions Group at our Bangalore Design Center, India and will be responsible for the development of functional verification solutions for the IP which is used in end-customer applications such as server farms, AI/machine learning, automotive, etc. The candidate will work with our internationally based team of architects/designers/other verification team members across multiple sites worldwide. The position offers learning and growth opportunities. This is a Senior Technical Individual Contributor role and offers challenges to work on technically challenging IP Cores in the Verification domain.
Job Responsibilities
  • Write verification plans and specifications
  • Make architecture decisions on test bench design
  • Implement test bench infrastructure and write test cases
  • Implement a coverage driven methodology
  • Perform technical lead role
Key Qualifications --
Must have BSEE in EE with 8+ years of relevant experience or MSEE with 7+ years of relevant experience in the following areas:
  • Knowledge of one or more of protocols: DDR/PCIE/AMBA (AMBA2, AXI, CHI)/ SD/eMMC/ Ethernet/USB/ MIPI
  • Hands on experience in creating Test Environment from Functional Specifications using UVM/VMM/OVM, Test Planning, Coverage closure, Assertion based verifications
  • Proficient in SV and UVM, Object oriented coding and verification
  • Able to provide verification solutions for productivity, performance and throughput improvement
  • Knowledge of C/C++, TCL, Perl, Python is added advantage
  • Ability to work independently, precisely and to drive innovation
  • In addition, the candidate should have good communication skills, will be a team player and will have good problem solving skills.
  • Experience of working with Functional safety, ISO26262 , FMEDA is an added advantage
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Synopsys Hiring Process 1. Apply. As an applicant, your resume, skills, and experience are being reviewed for consideration. 2. Phone screen. Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you and share more about the role. 3. Interview. You will be invited to meet with the hiring team to measure your qualifications for the role. Our interviews are held either in person or via zoom. 4. Offer. Congratulations! You have been selected as a finalist; your recruiter will reach out to propose your offer details. A written offer will soon follow. 5. Onboarding. You will be invited to complete new hire documents to ensure you are set-up and prepared for your first day. 6. Welcome. Your hiring manager, team, and an assigned buddy will help you get acclimated. Over the next few weeks, you will receive communications and engagement invitations that will help ramp you up for your future at synopsys

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