Job Description:

This position is in a cutting-edge synthesis product, in the area of Logic synthesis and Optimization.  The candidate will be required to work on enhancing the optimization flow for performance, power, area (PPA) or runtime.  This will involve identifying the opportunity for improving PPA, proposing a good solution/algorithm, implementing it, thoroughly testing it, and supporting it post-deployment.

Job Requirements

1. At least 5 years of work experience in EDA, preferably in logic optimization and logic synthesis.

2. Strong software skills: minimum 5 years of coding experience in C++.

3. Proficiency in data structures and algorithms.

4. Strong analytical and problem-solving skills.

5. Good understanding of chip design flow.

6. Must be a team player, clear in written and oral communication skills and open to work with diverse teams across multiple time zones.