At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Sr. R&D Engineer

This engineer will be a member of a high-caliber R&D team creating technologies and products that enable static timing analysis and optimization of the high-speed, low-power custom digital circuits commonly used in smart-phones, tablets, CPUs, GPUs, FPGAs, etc. Specific projects include the design of circuit simulation and timing modeling algorithms to support analysis and optimization of complex, bleeding-edge multi-million transistor ICs and SoC chips.

Desired Skills and Experience

·        Industry experience developing and maintaining C or C++ based applications on a Unix or Linux environment

·        Experience in development of circuit timing analysis or simulation programs

·        Experience with quality and software processes

·        Proficiency designing data structures, algorithms, and software engineering principles

·        Proficiency in analyzing transistor or gate level schematics

·        The preferred candidate is expected to have a Masters or PhD in CS/EE/CE with 5+ years of relevant experience