Layout Design, Sr Engineer
Overview
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
Job Description
Job Title: Analog/Mixed-Signal Layout Methodology Engineer
Company: Synopsys
Role Description:
Synopsys, at the forefront of technological innovation, is seeking an Analog/Mixed-Signal Layout Methodology Engineer. As a member of our Mixed Signal IP Methodology Team, you will work with the most advanced chip design technologies and tools. You will collaborate with local and global teams to develop capabilities that improve the time-to-market of complex mixed-signal designs in the latest technology nodes. This role offers the opportunity to lead technical projects, coordinate with other team members, and develop our best-in-class utilities.
Key Responsibilities:
- Propose and develop innovative methodologies to accelerate layout development without compromising quality.
- Collaborate with cross-teams in the enablement of advanced technology nodes.
- Measure project performance using appropriate systems, tools, and techniques.
- Establish and maintain relationships with cross-functional teams, internal and external customers.
- Create and maintain comprehensive methodology and workflow documentation.
Key Qualifications:
- Familiarity with the physical design of analog and mixed-signal CMOS circuits.
- Proficiency in TCL and/or Python.
- Understanding of the full design cycle from RTL to GDSII, including chip level.
- Excellent communication skills.
- Strong organizational skills, attention to detail, and multi-tasking abilities.
- Experience with advanced FinFET nodes, TSMC 16 nanometer and below.
- Familiarity with Design tools such as Custom Compiler, Cadence Virtuoso, or equivalent.
- Knowledge of Verification tools like ICV, Calibre.
- Experience working with Jira/Atlassian or similar tools.
- Strong working knowledge of MS Office Suite of applications.
Preferred Experience and Requirements:
- MSEE or BSEE with a minimum of 3 years of related experience.
- Previous analog layout physical design experience.
Join us to contribute to the evolution of technology and leave your mark on the semiconductor industry. Contact us today to learn more about this exciting opportunity!
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
-
Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
-
Time Away
In addition to company holidays, we have ETO and FTO Programs.
-
Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
-
Retirement Plans
Save for your future with our retirement plans that vary by region and country.
-
Compensation
Competitive salaries.
** Benefits vary by country and region - check with your recruiter to confirm
Hiring Journey at Synopsys
Find the open role that’s
right for you
-
Staff R&D Engineer
Sunnyvale, California
-
NVM Test and Validation Engineering, Sr. Staff Engineer - 9633
Ottawa, Canada
-
ASIC Digital Verification Design, Staff Engineer
Mississauga, Canada
-
SW Engineer-EDA-7333
Hillsboro, Oregon
View all job opportunities here
View all job opportunities here
We're proud to receive several
recognitions
Explore the Possibilities
with Synopsys
Follow #lifeatSynopsys