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ASIC Digital Design Engineer, Sr

pin iconWuhan, Hubei China Apply Now
Category: Engineering Hire Type: Employee
Job ID 46383BR Date posted 10/12/2023
Seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow.
The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation high speed SERDES, such as USB4.0v2, USB4.0, PCIe4.0, Ethernet, DP2.0, HDMI2.1, and MIPI MPHY products (up to 24 Gbps).
Solid theoretical and practical background in high-speed SERDES and data recovery circuits is a solid plus.
The position offers an excellent opportunity to work with a professional team of digital and mixed-signal engineers responsible for delivering high-end mixed-signal designs from specification development to performing functional and performance tests on prototype test-chips.

The PHY IP development is very dynamic and provides an endless list of challenges. The candidate would have an initial training done by the top experts in the field as well as continuous on the job training and assignments. The work is very challenging, not only given the constant technological changes but also given the ownership and the need to charter unknown waters.

Key Qualifications
  • MSEE graduate or BSEE plus minimum 3 years of digital design and verification experience in the industry
  • Good experience in writing block-level test-cases including constrained directed random tests
  • Must be familiar with Verilog and VCS. Good knowledge of back-end synthesis tools DC/PT is required
  • Must have knowledge of digital design methodologies, ATE production testing, DFT insertion, Synthesis constraints and flows
  • Scripting experience in Shell, Perl, Python and TCL is a plus
  • Good theoretical and practical understanding of digital signal processing and data recovery circuits is required
  • Good communication skills for interacting between different design groups and customer support teams are required
  • Must be self-motivated, proactive, and able to balance good design quality while meeting tight deadlines
  • Resolves issues in creative ways and exercises independent judgment in selecting methods and techniques to obtain solutions
  • May guide more junior peers with aspects of their job. Networks with senior internal and external personnel in own area of expertise
  • Must exhibit ability to produce good results as independently and as a team contributor
Preferred Experience
  • RTL coding, modeling of analog blocks, and writing complex system-level test-benches in Verilog
  • Defining synthesis design constraints and resolving STA issues as well as gate-level simulation failures
  • Defining Clock/Reset domain crossing design constraints and evaluating violations using CDC/RDC tools
  • Enhancing and maintaining existing SERDES PHY IPs supporting multiple protocols
  • Interacting with Application Engineers for customer support and resolving technical issues with Analog and P&R teams.

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability
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Synopsys Hiring Process 1. Apply. As an applicant, your resume, skills, and experience are being reviewed for consideration. 2. Phone screen. Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you and share more about the role. 3. Interview. You will be invited to meet with the hiring team to measure your qualifications for the role. Our interviews are held either in person or via zoom. 4. Offer. Congratulations! You have been selected as a finalist; your recruiter will reach out to propose your offer details. A written offer will soon follow. 5. Onboarding. You will be invited to complete new hire documents to ensure you are set-up and prepared for your first day. 6. Welcome. Your hiring manager, team, and an assigned buddy will help you get acclimated. Over the next few weeks, you will receive communications and engagement invitations that will help ramp you up for your future at synopsys

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