Serdes PHY ( PCIe) Design & Verification
Overview
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
Job Description
- Seeking a highly motivated and innovative digital design engineer with excellent theoretical and practical background in high-speed data - recovery circuits.
- Working as part of a highly experienced mixed-signal design team, the candidate will be involved in designing and maintaining current and next generation PCIe Gen5, USB 2/3 SERDES, SATA, 10G-KR and HPC products.
- The position offers excellent opportunity to work with a professional team of digital and mixed signal designers responsible for delivering high-end mixed-signal designs from specification development to performing functional and performance tests on the test-chips.
- In addition, this is a great opportunity to work with a wide suite of in-house digital design and verification tools, including VCS, Design Compiler, PrimeTime, Tetramax and so on.
Key Qualifications
- Typically requires BS or MS plus at least 1-2 years of digital design experience in the industry as well as hands on experience in designing high-speed digital circuits, writing test-cases in Verilog and System Verilog, and familiarity with code quality metrics
- Deep understanding of asynchronous clock crossings, DFT design methodologies, and synthesis implications of RTL
- Knowledge of back-end synthesis tools DC/PT is a plus as are good organization and communication skills for interacting between different design groups and customer support teams
- Good learning ability and communication skill
- Good script skill as Perl, TCL
Preferred Experience
- Customer package creation and regression flow developed with Perl or TCL script
- RTL coding of high-speed digital circuits, modeling of analog blocks
- Writing verilog and system-verilog test-benches
- Synthesis, Defining place and route constraints, resolving STA issues and performing gate-level simulations
- Defining and debugging DFT structures in the designs for high DFT coverage
- Design Flow development as the DFT OCC, boundary scan flow, Spyglass flow
- Interacting with customer support and back-end design teams
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
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Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
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Time Away
In addition to company holidays, we have ETO and FTO Programs.
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Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
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Retirement Plans
Save for your future with our retirement plans that vary by region and country.
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Compensation
Competitive salaries.
** Benefits vary by country and region - check with your recruiter to confirm
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