Hardware Release Engineering, Engineer

Synopsys Mixed Signal Intellectual Property (MSIP) Products are used in electronic devices we use and access every day. As a HW Release Engineer, you will play an important role which directly impacts the customer experience with the Synopsys MSIP products.
As a HW Release Engineer, you will be responsible for generation of the customer-deliverable design kit packages for DDR, HBM, UCIe Physical Interface (PHY) and other MISP Products. Your responsibilities will include the building, checking, problem resolution, release note generation, verification, and general QA of the packages before they are released for customer use.

Responsibilities:
• The build and verification of individual DDR/HBM/UCIE PHY components
• The build and verification of complete DDR/HBM/UCIE PHY packages
• Ensuring each DDR/HBM/UCIE PHY release package interoperates with the appropriate controller
• Maintain Bill of Materials (BOM) for individual DDR/HBM/UCIE PHY components
• Verify each DDR/HBM/UCIE PHY component and release matches the BOM
• Work closely with R&D & Application Engineers to ensure timely debug and resolution of all problems which arise
• Other related tasks such as developing scripts and other automations

Requirements:
• Working knowledge of models used in IP & SOC design (GDSII, LEF, LIB, Verilog, etc.)
• Understanding of the analog and digital design flows
• Experience with UNIX/Linux operating systems
• Scripting ability (bash, TCL, Perl, Python)
• Basic knowledge of Synopsys design tools is an asset
• Previous work experience in SOC design and verification is an asset
• Good written and verbal English language skills
• BS or MS degree in Computer Science or Electrical Engineering

Personal Qualifications:
• Quick learner with the ability to learn new tools and processes
• Self-motivation, and have a problem solving skills and attitude
• Strong organizational skills with an attention to detail
• Excellent teamwork and communication skills
• Able to work under schedule pressure