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Serdes Front end System Architect

pin icon , Canada
Kanata, Ontario, Canada
Mississauga, Ontario, Canada
Toronto, Ontario, Canada
Ottawa, Ontario, Canada Apply Now
Category: Engineering Hire Type: Employee
Job ID 50449BR Date posted 05/27/2024
System Architecture Team

You will be part of an R&D team developing 32Gbps NRZ and 112Gbps PAM4 serial-link transceivers. Specifically, you will be responsible for modelling, design, analysis, and algorithms the transmitter and receiver mixed signal (analog and digital) front-end. We are looking for an engineer with theoretical knowledge and practical experience to contribute to the team. You will work with a cross functional design team of analog and digital designers, and hardware engineers.

You will be involved in all stages of development including:
  • Architecture: definition of architecture and specifications for the transmitter and receiver
  • Modelling: design and maintenance of the system level model
  • Sign-off: system level simulation of the design performance across multiple protocols and channels
  • Silicon: qualification and correlation of performance and algorithms in silicon
  • Customers: assisting customers on system level performance and algorithmic issues

You have an MSc or PhD in Electrical or Computer Engineering.

Due to the cross disciplinary nature of this position, key qualifications include one or more of the following…
  • Modelling - experience in Matlab/C/systemVerilog modeling of circuits and systems
  • Analog – background in high-speed analog CMOS circuit design
  • Digital – experience with DSP
  • Hardware – awareness on per-protocol handing of RX and TX adaptation ; hands on experience in measurement of transceiver performance
  • Communications theory – equalization, coding, noise/crosstalk filtering

Beneficial Experience:
  • Experience in analyzing link budgets for either NRZ and PAM4 high-speed serial links
  • Familiarity with modelling of SERDES transmitters and receivers in Matlab or similar tool
  • Knowledge of circuit topologies in high-speed Rx/Tx SerDes PHY
  • Understanding of Tx/Rx equalization techniques.
  • Knowledge of CDR architectures and CDR loop dynamics
  • Knowledge about common high-speed serial data protocols including PCIe, Ethernet, JESD, and CPRI
  • Experience in lab testing of high-speed serial links

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

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