A&MS Layout Engineer, Staff

A&MS Layout Engineer for the Analog and Mixed Signal IP group developing physical layout of High Speed Analog Integrated Circuits. You will be working in a team of Analog/Mixed Signal Custom Layout Design Engineers who will be working on the SerDes and Analog Mixed Signal IP blocks. You are expected to coach junior members in the team and also use innovative approaches when drawing layout so that it helps the layout to be ported easily between different process nodes. To be successful in the role, you should be able to develop and maintain schedules while being proficient in understanding the complexities involved in High Speed Analog Layout design. Receives little to no instructions on day-to-day work, occasionally receives general instructions on new assignments and projects. Determines and develops approach to solutions. Work is independent and collaborative in nature. Provides regular updates to manager on project status. Frequently networks with senior internal and external personnel in own area of expertise. You should also have a strong desire to learn and explore new technologies while demonstrating good analysis and problem solving skills. Prior knowledge and experience in CAD tool usage is a must; specifically, Custom Designer/Cadence Virtuoso, Calibre, ICV, Hercules, STAR-RXCT.
Desired Skills:

• In depth familiarity with layout of analog and mixed signal CMOS circuits
• Exposure to Analog/Mixed Signal circuit layout (i.e RX, TX, PLL, etc..)
• Familiarity with Custom digital layout (i.e high speed logic paths)
• Aware of layout techniques to mitigate ESD, latchup
• Knowledge of layout effects (like matching, proximity effects etc)
• Knowledge of design for reliability (i.e EM, IR etc..)
• Knowledge of rules for advanced technology nodes across multiple foundries (SEC, TSMC, GF, Intel)
• Knowledge of DFM Rules for advanced technology nodes (16nm and below)
• Strong debugging, analytical and trouble shooting skills
• Excellent documentation and communication skills