We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly skilled and motivated R&D Engineer with a passion for pushing the boundaries of technology. You thrive in a collaborative environment and excel at problem-solving complex issues. Your expertise in physical implementation at sub-4nm process technologies and deep understanding of advanced process technology, including finFET, GAA, and EUV, make you an invaluable asset to our team. You are eager to work closely with leading foundries and Synopsys R&D to optimize EDA engines for cutting-edge process technology. Your ability to study and enhance PPA entitlement of novel process technologies, and develop new features to push the PPA envelope, demonstrates your commitment to innovation and excellence. You are a proactive communicator, capable of providing insightful feedback on technology collaterals to improve PPA and yield.

What You’ll Be Doing:

• Collaborating with foundries and research organizations through DTCO activities.
• Providing feedback on technology collaterals (design rules, libraries, PDK) to improve PPA of process technology under development.
• Studying the PPA entitlement of novel process technologies.
• Enhancing Synopsys tool flow and developing new features to push the PPA envelope.
• Working closely with Synopsys R&D to optimize the EDA engines for the process technology under development.
• Identifying and addressing potential issues associated with new process technology.

The Impact You Will Have:

• Contributing to the optimization of Power-Performance-Area (PPA) at the most advanced process nodes.
• Driving technological innovations that enhance the efficiency and performance of semiconductor designs.
• Playing a key role in the development and enhancement of Synopsys EDA software.
• Improving process technology for better PPA and yield.
• Collaborating with foundry partners to advance process technology development.
• Influencing the direction of future technology through insightful feedback and collaboration.

What You’ll Need:

• A relevant degree in electrical or computer engineering or computer science.
• 5+ years of experience in physical implementation at sub-4nm process technologies.
• Good understanding of advanced process technology (4nm and below process nodes; finFET / GAA / EUV).
• Experience in advanced process technology development and/or enablement/DTCO/pathfinding (Plus Point).
• Solid technical understanding of the underlying concepts of IC design, implementation flow, and sign-off methodologies at advanced process nodes.

Who You Are:

• Collaborative and able to work effectively with cross-functional teams.
• Proactive and capable of identifying potential issues and providing solutions.
• Innovative with a strong desire to push the boundaries of technology.
• Excellent communicator, able to convey complex technical information clearly.
• Detail-oriented with strong problem-solving skills.

The Team You’ll Be A Part Of:

You will be a member of the team driving Power-Performance-Area (PPA) optimization at the most advanced process node through Design Technology Co-Optimization (DTCO) collaboration with foundries. This team works closely with Synopsys R&D and foundry partners to enhance Synopsys EDA software and improve process technology for PPA and yield.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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