ASIC Physical Design Engineer
Overview
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
Job Description
Alternate Job Titles:
- ASIC Physical Design Engineer
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are a passionate and skilled ASIC Physical Design Engineer with a keen interest in advancing technology and innovation. You hold a Bachelor’s or Master’s degree in electronics or electrical engineering or an equivalent qualification from a reputed university. With 1-2 years of experience in ASIC Physical design, you are well-versed in working with advanced technology nodes like 28nm, 16nm, 14nm, 10nm, and 7nm across different foundries. Your understanding of CMOS logic design at both gate and circuit levels is robust. You excel in Place & Route and Physical verification (DRC/LVS) and are familiar with all stages of the ASIC design flow, including Synthesis, Timing analysis, Floor planning, Power planning, CTS, ECO flow, STA, Power analysis, Timing, and design closure. You have a good grasp of Low power concepts and UPF/CPF format and understand the process of generating Technology files, Liberty, Lef, Def, Gds, and standard cells views. Your experience with Synopsys tools like ICC-II, FC, DC, PT, and ICV is notable, and additional knowledge of Cadence and Mentor tools is a plus. You possess excellent communication and interpersonal skills and thrive in a team environment.
What You’ll Be Doing:
- Developing robust ASIC design flows to build and verify our standard cell libraries to achieve optimal PPA with high quality.
- Performing Place and Route using ICC-II/FC.
- Interacting with different functional teams within the logic library organization and tools teams to report and resolve issues identified during validation of logic libraries.
- Supporting the Application engineering team on customer queries and issues.
- Ensuring the integration of more capabilities into an SoC quickly and efficiently.
- Contributing to the development of differentiated products that meet unique performance, power, and size requirements.
The Impact You Will Have:
- Enhancing the efficiency and reliability of our standard cell libraries.
- Ensuring the successful integration of advanced technology nodes into our products.
- Supporting the development of high-performance silicon chips.
- Driving innovation and technological advancement in chip design.
- Helping customers bring differentiated products to market quickly with reduced risk.
- Contributing to the Era of Smart Everything through continuous technological innovation.
What You’ll Need:
- Bachelor’s or Master’s degree in electronics or electrical engineering or equivalent.
- 1-2 years of experience in ASIC Physical design.
- Experience with advanced technology nodes (28nm, 16nm, 14nm, 10nm, 7nm).
- Strong Place & Route and Physical verification (DRC/LVS) skills.
- Familiarity with all stages of the ASIC design flow.
- Understanding of Low power concepts & UPF/CPF format.
- Experience with Synopsys tools (ICC-II, FC, DC, PT, ICV).
- Good communication and interpersonal skills.
Who You Are:
A proactive and detail-oriented engineer who thrives in a collaborative environment. You are an effective communicator, a problem-solver, and a team player with a passion for innovation and technology. Your ability to work with various teams and manage multiple tasks efficiently is commendable.
The Team You’ll Be A Part Of:
You will be part of a dynamic and innovative team focused on developing and verifying standard cell libraries to achieve the best performance, power, and area (PPA). The team collaborates with various functional teams within the logic library organization and tools teams to ensure the successful integration of advanced technology nodes into our products.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
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Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
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Time Away
In addition to company holidays, we have ETO and FTO Programs.
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Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
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Retirement Plans
Save for your future with our retirement plans that vary by region and country.
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Compensation
Competitive salaries.
** Benefits vary by country and region - check with your recruiter to confirm
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