R&D Engineering, Staff Engineer (C/C++, Data Structures, Algorithm, RTL compiler)

Bengaluru, Karnataka, India

Engineering

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Overview

Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development.

Job Description

Date posted 05/03/2026

Category Engineering Hire Type Employee Job ID 17265 Remote Eligible No Date Posted 05/03/2026

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You are someone who has traced the path from high-level design down to the bits that actually run on silicon, and you know that every line of compiler code can ripple through to the final chip. You thrive in large, layered codebases where data structures and algorithms are the difference between a tool that flies and one that crawls. You notice the subtle bugs that only show up in customer flows and you care enough to dig in until they are gone. You have written and maintained code that lives at the heart of EDA tools, and you know what it means to keep it efficient, reliable, and understandable by the next engineer. You are comfortable moving between C++ and C, sketching out a parsing routine, or optimizing a graph traversal. You like working with complex languages like Verilog and VHDL, and the challenge of keeping up with both the theory and the practical quirks of real-world RTL. You bring a methodical approach to profiling, testing, and documentation, because you know that’s how teams build tools that last. At Synopsys, your work will shape the FPGA flows that engineers around the world depend on.

What You'll Be Doing

Design, develop, troubleshoot, and maintain large-scale software systems for the RTL compiler stage of FPGA implementation and prototyping tools using C and C++.
Write clear, detailed requirement and functional specifications that become the backbone for new features and system improvements.
Build and optimize data structures and graph algorithms tailored for high-performance EDA workflows.
Integrate advanced software engineering tools into your workflow, including static analysis, memory and runtime profiling, code coverage, and unit testing frameworks.
Collaborate with the CAE team to plan and execute test strategies, and provide expert-level support to resolve customer issues.
Maintain and enhance existing product features, ensuring robust performance and continuous reliability.
Navigate and contribute to a complex design automation environment, balancing new development with legacy code stewardship.

The Impact You Will Have

Enable faster, more reliable FPGA prototyping for teams designing tomorrow’s chips.
Reduce runtime and memory use in critical RTL compilation flows, letting customers handle larger, more complex designs.
Improve code quality and maintainability, making it easier for future engineers to extend and support the toolset.
Resolve customer-reported issues that directly affect tapeouts and time-to-market.
Bring best practices in testing and documentation, raising the bar for engineering rigor across the team.
Make complex HDL and RTL flows more accessible and robust for design engineers worldwide.
Help Synopsys defend and extend its leadership in digital design automation.

What You'll Need

B.Tech or M.Tech in Computer Science or Electrical Engineering from a reputed institute.
At least 5 years of hands-on experience designing, developing, and maintaining large EDA software systems.
Deep expertise in data structures, graph algorithms, and C/C++ programming on both Windows and Unix environments.
Solid grounding in parsing, elaboration, control and data flow analysis, and logic synthesis.
Strong knowledge of Verilog and VHDL HDL/RTL languages and digital logic design.
Experience working in large, multi-component codebases for design automation.
Familiarity with tools for profiling, coverage, and unit testing is a plus.

Who You Are

You spot subtle bugs in a sea of code and follow them all the way to root cause.
You can explain the tradeoffs in a graph algorithm to a fellow engineer without resorting to jargon.
You write specifications that clarify instead of confuse, making life easier for everyone who comes after.
You’re methodical in testing and documentation, and you don’t cut corners even when the schedule gets tight.
You are comfortable supporting both your own code and legacy modules, and you don’t shy away from the messy parts.
You thrive when collaborating with others, whether they’re CAE engineers, customers, or your code review partner.

The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

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Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.
Time Away

In addition to company holidays, we have ETO and FTO Programs.
Family Support

Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
ESPP

Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
Retirement Plans

Save for your future with our retirement plans that vary by region and country.
Compensation

Competitive salaries.

** Benefits vary by country and region - check with your recruiter to confirm

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Hiring Journey at Synopsys

Apply

As an applicant your resume, skills, and experience are being reviewed for consideration.

Phone Screen

Once your resume has been selected a recruiter and/or hiring manager will reach out to learn more about you and share more about the role.

Interview

You will be invited to meet with the hiring team to measure your qualifications for the role. Our interviews are held either in person or via Zoom.

Offer

Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept!

Onboarding

There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation.

Welcome!

Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

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