Alternate Job Titles:

• Embedded Memory Design Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a seasoned professional with a passion for cutting-edge technology and innovation. With 7-13 years of experience, you bring a wealth of knowledge in CMOS memory design and circuit implementation. Your expertise lies in developing embedded memories such as SP SRAM, DP SRAM, Register File, and ROM. You are proficient in schematic entry, circuit simulation, layout planning, and design verification. You thrive in a collaborative environment, interfacing with CAD and Frontend engineers to drive memory compiler automation and EDA model generation. Your attention to detail ensures the highest quality in bit cell development and physical layout design. Self-motivated and self-directed, you demonstrate excellent analytical and problem-solving skills. You are adept at programming in C-Shell and Perl, with additional skills in C++ or Java script being a plus. Your strong command of English, both verbal and written, enables you to communicate effectively with team members and stakeholders. You are committed to continuous learning and professional growth, and you bring professionalism, critical thinking, and a focus on future goals to your work. Inclusion and diversity are important to you, and you contribute to a collaborative and inclusive work environment.

What You’ll Be Doing:

• Develop CMOS embedded memories such as SP SRAM, DP SRAM, Register File, and ROM.
• Design architecture and circuit implementation, focusing on ultra high speed, ultra low power, or high density designs.
• Perform schematic entry, circuit simulation, layout planning, layout supervision, design verification, and validation.
• Interface with CAD and Frontend engineers for memory compiler automation, EDA model generation, and full verification flow.
• Perform bit cell development and verification, and drive physical layout design and verification.
• Provide support and/or perform other duties as assigned and required.

The Impact You Will Have:

• Contribute to the development of high-performance silicon chips and software content.
• Enhance the efficiency and performance of our CMOS memory designs.
• Drive innovation in ultra high speed, ultra low power, and high density memory designs.
• Ensure the highest quality in bit cell development and physical layout design.
• Collaborate effectively with CAD and Frontend engineers to streamline automation and verification processes.
• Support the continuous improvement and advancement of our memory design technology.

What You’ll Need:

• Bachelor’s or Master’s degree in Electrical Engineering, Telecommunication, or related fields.
• Proficiency in CMOS memory design, circuit simulation, memory layout designs, layout parasitic extraction, and layout verification tools and debugging techniques.
• Programming capability in C-Shell and Perl; knowledge of C++ or Java script is a plus.
• Strong analytical and problem-solving skills with attention to detail.
• Experience in developing documents, reports, or presentations for a range of tasks.

Who You Are:

• Self-motivated, self-directed, detail-oriented, and well-organized.
• Possess excellent analytical, problem-solving, and negotiation skills.
• Capable of leading and mentoring trainees and junior engineers, as well as managing projects.
• Strong command of English, both verbal and written.
• Exhibit strong interpersonal communication and teamwork skills.
• Professional, critical/logical thinker, and focused on future goals.
• Highly committed to continuous learning and professional development.

The Team You’ll Be A Part Of:

You will be a key member of our innovative R&D Engineering team, focused on developing cutting-edge CMOS embedded memories. Our team thrives on collaboration and continuous improvement, working together to achieve technological advancements that shape the future. You will have the opportunity to lead and mentor junior engineers, contributing to a culture of learning and excellence.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.