Staff Analog/Mixed-Signal Design Engineer
Overview
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
Job Description
Category Engineering Hire Type Employee Job ID 17060 Remote Eligible No Date Posted 04/29/2026
Synopsys is at the heart of all the advanced silicon design, we supply the essential tools and intellectual properties to enable semiconductor design, verification, and production. We’re powering all state-of-the-art design market with the world’s most advanced technologies for chip design and software security.
LPDDR PHY IP is a staple of the mixed-signal IP market, and Synopsys is the leading provider of LPDDR PHY IP products. All current and next-generation technologies are being developed by the LPDDR PHY IP team, both digital and analog components, complement each other in creating a high-performance, high-bandwidth, low-latency and low-power products.
We are looking for an ASIC Digital Design Sr. Manager to join Synopsys LPDDR PHY IP team to lead innovation and development of the world-class market-leading DesignWare LPDDR PHY IP solution.
Job Description
- Be part of a global diverse team that pushes boundaries on DDR PHY IP development and solution
- Your passion and expertise will shape the next generation of product innovation, performance, and efficiency
- You will manage a team of design engineers and work with Architect, Verification, Physical implementation, and Firmware teams
- In this role, you will contribute to all phases of designs of DDR PHY IP from design specification to productization, including certain level of customer support into their SoCs
- You will lead the team to deliver the design and achieve the best timing, performance, and power goals
Required Skills
- BS in Electrical Engineering with at least 12-15 years of experience in complex technical development
- 2 years of experience in people management, developing employees
- Experience with synthesizable Verilog and System Verilog design concepts and implementation
- Experience with front-end design flows including linting, synthesis, STA, cross-domain clocking, DFT, and power optimization techniques
- Exhibit excellent communication skills and be self-motivated
- Understanding of memory and memory PHY architecture is a plus
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
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Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
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Time Away
In addition to company holidays, we have ETO and FTO Programs.
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Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
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Retirement Plans
Save for your future with our retirement plans that vary by region and country.
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Compensation
Competitive salaries.
** Benefits vary by country and region - check with your recruiter to confirm
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