Layout Design, Sr Engineer
Overview
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
Job Description
Job Descriptions
Candidates do not have to have experience on all the tasks below, there will be trainings to new engineers to adapt with Synopsys design and flows.
- Work on custom layout Analog IPs like High Speed IOs, PLL, DLL, Bandgap, High Speed macros for PHY, Clock trees...
- Floor planning, power design, signal routing strategy, EMIR awareness, parasitic optimization for layout blocks from schematics
- Understand and apply Analog Layout techniques to ensure design meet performance with minimum area and good yield.
- Participate in building and enhancing layout flow for faster, higher quality design process.
- Do layout verification for DRC/LVS/ERC/ANT/ESD/DFM
- Do PERC verification for ESD/LUP checks
- Complete all design quality checks and data quality checks
- Work with Place and Route engineer to integrate analog layouts into top level.
- Work with Package team to ensure the integration of top die and package
- Do design reviews across global team
- May collaborate in package design (interposer design, RDL design)
- Work closely with design team in Viet Nam, USA, Canada and other countries to ensure the success of the whole product.
- May join research programs to implement new ideas for future products and flows
- May lead a layout team to complete a full design block
- Mentor junior layout engineers or interns
Skills Requirements:
- BS in Electronics Engineering, Electromechanics, Telecommunications.
- 3+ years of experience in custom layout.
- Familiar with Layout entry tools: Cadence, Synopsys
- Familiar with Layout verification tools: Mentor Calibre, Synopsys ICV
- Understand basic semiconductor fabrication processes
- Understand MOSFET fundamentals
- Understand layout techniques for high speed, matching, ESD, Latchup, Antenna, EMIR.
- Experienced with mentoring/leading junior layouts to complete a design.
- Experienced with writing layout review presentations and layout verification reports
- Good English communication
- Strong team player
- Self-motivated, humble, honest and willing to learn.
Synopsys delivers the most trusted and comprehensive silicon to systems design solutions, accelerating technology innovation. We partner closely with our customers to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Companies trust Synopsys to pioneer new technologies to help them get to market faster without compromise.
Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
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Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
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Time Away
In addition to company holidays, we have ETO and FTO Programs.
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Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
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Retirement Plans
Save for your future with our retirement plans that vary by region and country.
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Compensation
Competitive salaries.
** Benefits vary by country and region - check with your recruiter to confirm
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