ASIC Digital Design Staff Engineer - RTL

Category Engineering Hire Type Employee Job ID 13376 Remote Eligible No Date Posted 30/11/2025

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a skilled digital design engineer with strong ASIC experience and a passion for innovation. You bring at least 5 years (BSEE) or 3 years (MSEE) of hands-on digital design, with a solid grasp of RTL coding (Verilog/SystemVerilog), and a knack for debugging both simulation and silicon issues. You’re comfortable with Synopsys EDA tools, thrive in collaborative environments, and communicate clearly across teams. You’re curious, eager to learn new technologies, and have an interest in DDR/LPDDR, HBM, or UCIe. Scripting skills and analog circuit knowledge are a plus. You’re driven, detail-oriented, and ready to contribute to advanced memory IP design.

What You’ll Be Doing:

• Designing and implementing digital ASIC blocks for LPDDR6/DDR IP.
• Writing and verifying RTL code (Verilog/SystemVerilog).
• Running lint, CDC, DFT, and synthesis checks.
• Debugging simulation and silicon issues.
• Using Synopsys EDA tools: VCS, Verdi, Spyglass, DC, Formality.
• Collaborating with design, verification, and customer teams.

The Impact You Will Have:

• Advance next-generation memory IP for global applications.
• Ensure robust, high-quality ASIC designs.
• Accelerate design cycles and improve product reliability.
• Deliver excellent customer support and technical solutions.
• Promote innovation and best practices within the team.
• Contribute to Synopsys’ leadership in the semiconductor industry.

What You’ll Need:

• BSEE + 5 years or MSEE + 3 years in digital design.
• Strong RTL coding (Verilog/SystemVerilog) skills.
• Debugging expertise for simulation/silicon.
• Experience with Synopsys EDA tools.
• Knowledge of lint, CDC, DFT, synthesis flows.

Who You Are:

• Analytical, detail-oriented, and proactive.
• Excellent communicator and collaborator.
• Quick learner with a passion for technology.

The Team You’ll Be A Part Of:

Join a diverse, expert team focused on LPDDR6 and next-gen memory IP, where collaboration and technical excellence drive success.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.