SiCADA Intern IC Design & Verification Teaching Assistant (VDM / ADV) - 16432

Hsinchu, Taiwan, Taiwan

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Job Description

Date posted 03/16/2026

Category Interns/Temp Hire Type Intern Job ID 16432 Remote Eligible No Date Posted 03/16/2026

SiCADA Internship Program 2026 - IC Design & Verification Teaching Assistant (VDM / ADV)

Job Description:
- Assist SiCADA instructor in developing VDM (Verilog Design Methodology) & ADV (Advanced Design Verification) homework specifications.
- Assist in reviewing ADV course materials, including SVTB (SystemVerilog Testbench) and UVM (Universal Verification Methodology), and update the course content.
- Serve as a teaching assistant for the VDM and ADV courses, helping to answer student questions and grade assignments.
- Support SoC implementation course especially STA and UPF teaching assistance if possible.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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