ASIC Digital Design, Sr Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly motivated Senior Verification Engineer with a passion for developing functional verification solutions for complex IP cores. You thrive in dynamic environments and have a knack for problem-solving and innovation. Your technical expertise and leadership skills enable you to make architectural choices and implement test bench infrastructure effectively. With a strong background in one or more protocols such as PCIe, Ethernet, USB, or MIPI, you bring hands-on experience in creating test environments from functional specifications using UVM/VMM/OVM methodologies. Your proficiency in SystemVerilog and UVM, coupled with object-oriented coding and verification, sets you apart. You are a team player with excellent communication skills, capable of working independently and driving productivity and performance improvements. Additional knowledge in C/C++, TCL, Perl, Python, and experience with functional safety standards like ISO 26262 and FMEDA is a plus.

What You’ll Be Doing:

• Writing verification plans and specifications.
• Making architectural choices on test bench design.
• Implementing test bench infrastructure and writing test cases.
• Implementing a coverage-driven methodology.
• Performing a technical lead role.
• Collaborating with international teams to drive verification solutions for IP cores used in server farms, AI/machine learning, automotive, and other applications.

The Impact You Will Have:

• Ensuring high-quality verification of complex IP cores.
• Contributing to the development of innovative verification methodologies.
• Driving architectural and test bench design choices that impact overall project success.
• Enhancing productivity and performance through effective verification solutions.
• Supporting end-customer applications in various high-impact domains such as AI, automotive, and server farms.
• Collaborating with a global team to achieve verification excellence.

What You’ll Need:

• BSEE in Electrical Engineering with 3+ years of relevant experience or MSEE with 2+ years of relevant experience.
• Knowledge of one or more protocols: PCIe, Ethernet, USB, MIPI.
• Hands-on experience in creating test environments using UVM/VMM/OVM methodologies.
• Proficiency in SystemVerilog and UVM, with strong object-oriented coding and verification skills.
• Experience in C/C++, TCL, Perl, Python is an added advantage.
• Experience with functional safety standards like ISO 26262 and FMEDA is a plus.

Who You Are:

You possess excellent problem-solving skills and can work unsupervised with precision. As a team player, you have strong communication skills and can collaborate effectively with international teams. Your ability to drive innovation and improve verification productivity and performance sets you apart as a key contributor to our team.

The Team You’ll Be A Part Of:

You will join the Solutions Group at our Hyderabad Design Center, India, where you will work with a global team of architects, designers, and verification engineers. Our team focuses on the functional verification of RTL-based IP cores, supporting a wide range of applications including server farms, AI/machine learning, and automotive.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.