Analog Design, Principal Engineer

Analog Design, Principal Engineer

Our Solution IP group is looking for an enthusiastic individual to join our team. Come and be part of a collaborative team environment that innovates and develops the latest IP solutions that enable the way the world designs.  Join US!

Analog Design, Principal Engineer

You will be part of an R&D team developing high speed analog and mixed-signal integrated circuits for DDR/LPDDR PHY, High Bandwidth Memory (HBM) PHY, Universal Chiplet Interconnect Express (UCIe) PHY, and Mobile Storage PHY IPs. We are looking for an engineer with theoretical knowledge and practical experience to contribute to the team. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our design environment is best-in-class with a full suite of IC design tools, supplemented by custom in-house tools, and supported by an experienced software/CAD team.

Job Responsibilities

• Review JEDEC standards to develop analog and mixed-signal sub-block specifications
• Identify and refine circuit architectures to achieve optimal power, area and performance targets
• Propose design and verification strategies that efficiently use simulator features to ensure highest quality design
• Oversee physical layout to minimize the effect of parasitic, device stress, process variation, and ESD/Latch-Up protection
• Present simulation data for peer and customer review
• Document design features and test plans
• Consult on the electrical characterization of your circuit within the IP product

Job Requirements

• PhD with 10+ years, or MSc with 15+ years of analog IC design experience
• In depth familiarity with transistor level circuit design - sound CMOS design fundamentals
• Experience with FinFET technologies
• Detailed design experience with at least one, and familiarity with several other DDR or SerDes sub-circuits:  
  • receive equalizers, samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillator, phase mixer, delay-locked loop, phase locked loop, bandgap reference, ADC, DAC
• Aware of ESD issues (i.e. circuit techniques, layout)
• Familiarity with custom digital design (i.e. high speed logic paths)
• Knowledge of design for reliability (i.e. EM, IR, aging, etc.)
• Knowledge of layout effects (i.e. matching, reliability, proximity effects, etc.)
• Experience with tools for schematic entry, physical layout, and design verification
• Hands-on experience with physical layout of high speed circuits is a plus
• Knowledge of SPICE simulators and simulation methods
• Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture
• Experience with TCL, Perl, C, Python, MATLAB, or other scripting languages is desired.
• Good communication and documentation skills.