System Level Architect / Principal Engineer
Overview
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
Job Description
System Level Architect / Principal Engineer
You will be part of an R&D team developing >100Gbps NRZ and PAM4 serial-link transceivers as part of our Enterprise Serdes team for PCIe and Ethernet protocols. We are looking for an engineer with theoretical knowledge and practical experience to contribute and to lead the team. You will work with a cross functional design team of analog and digital designers, and hardware engineers.
You will be involved in all stages of development including:
- Architecture: definition of architecture and specifications for the transmitter and receiver
- Modelling: design and maintenance of the system level model
- Sign-off: system level simulation of the design performance across multiple protocols and channels
- Silicon: qualification and correlation of performance and algorithms in silicon
- Customers: assisting customers on system level performance and algorithmic issues
You have a MSc or PhD in Electrical or Computer Engineering.
Due to the cross disciplinary nature of this position, key qualifications include one or more of the following…
- Modelling - experience in Matlab/Simulink/C modeling of circuits and systems
- Communications theory – equalization, coding, noise/crosstalk filtering
- Digital – background in digital signal process (DSP)
- Analog – background in high-speed analog CMOS circuit design
- Hardware – awareness on per-protocol handing of RX and TX adaptation ; hands on experience in measurement of transceiver performance
Experience:
- Familiarity with modelling of SERDES transmitters and receivers in Matlab or similar tool
- Knowledge of circuit topologies in high-speed Rx/Tx SerDes PHY
- Understanding of Tx/Rx equalization techniques.
- Knowledge of CDR architectures and CDR loop dynamics
- Experience in analyzing link budgets for either NRZ and PAM4 high-speed serial links
- Knowledge about common high-speed serial data protocols including Ethernet, OIF, JESD, CPRI
- Experience in lab testing of high-speed serial links
Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.
Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
-
Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
-
Time Away
In addition to company holidays, we have ETO and FTO Programs.
-
Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
-
Retirement Plans
Save for your future with our retirement plans that vary by region and country.
-
Compensation
Competitive salaries.
** Benefits vary by country and region - check with your recruiter to confirm
Hiring Journey at Synopsys
Find the open role that’s
right for you
- Senior Staff Software Engineer (R&D) Yerevan, Armenia
- ASIC Digital Design, Sr Staff Engineer Sunnyvale, California
- Project Engineering Management, Sr Staff Engineer Lisbon, Portugal
- Analog Design Engineer Bhubaneswar, India
View all job opportunities here
View all job opportunities here
An award-winning culture powered by
our world class team
Explore the Possibilities
with Synopsys
Follow #lifeatSynopsys