SOC Engineering, Senior Manager (DFT)
Overview
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
Job Description
Category Engineering Hire Type Employee Job ID 17470 Remote Eligible No Date Posted 05/17/2026
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You have spent years in the DFT trenches, working on SoCs that actually tape out and ship, not just pass reviews. You know that test architecture decisions made during RTL freeze will either save or cost millions in production yield, and you are the engineer who makes those calls with confidence because you have seen what breaks at volume. You think in terms of scan chains, ATPG coverage, BIST insertion points, and post-silicon debug strategies before most people have finished reading the spec.
You do not just run tools. You understand the tradeoffs between test time, area overhead, and coverage, and you can articulate why a particular MBIST configuration makes sense for this memory subsystem on this project. You have debugged enough silicon to know that the best DFT strategy is the one that makes bring-up engineers thank you six months from now.
Leading a team or driving technical decisions as an individual contributor feels natural to you. You mentor engineers through complex integration issues, push back when a design decision creates untestable logic, and move projects forward even when requirements shift. At Synopsys, you will work on customer SoCs that span high-performance computing, automotive, and aerospace, using the same EDA tools and IP you are helping customers deploy.
What You'll Be Doing
- Lead DFT architecture, implementation, integration, and verification for complex SoCs and subsystems from specification through tapeout, working directly with customer design teams
- Define and execute test strategies across scan and ATPG, memory BIST, logic BIST, and analog/PHY test insertion to meet coverage, cost, and yield targets
- Develop DFT methodologies and guidelines using Synopsys EDA tools that solve real customer problems on active service projects
- Drive post-silicon support activities, working with test engineering and validation teams to debug failures and refine test patterns
- Provide technical leadership and mentorship to DFT engineers, guiding them through complex integration challenges and design tradeoffs
- Collaborate with cross-functional teams including RTL design, verification, physical design, and timing to ensure testability from architecture through signoff
- Manage DFT project deliverables, timelines, and quality for customer engagements within the Systems Solutions Group
- The Impact You Will Have
- Enable customers to achieve first-pass silicon success by catching design-for-test issues before tapeout, not during bring-up
- Reduce production test costs and time-to-market for SoCs powering high-performance computing, automotive, and aerospace systems
- Build reusable DFT methodologies and best practices that scale across multiple customer projects and design teams
- Improve test coverage and yield outcomes through architecture decisions that balance area, power, and testability constraints
- Grow the technical capability of the DFT team through hands-on mentorship and real-world problem solving on customer projects
- Strengthen Synopsys customer relationships by delivering test solutions that work in production, not just in simulation
- Influence the development of Synopsys EDA tools and IP by feeding real customer use cases and pain points back to product teams
What You'll Need
- Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, or related field
- +10 years of hands-on experience in SoC DFT, with proven expertise across scan and ATPG, memory BIST, logic BIST, and analog test
- Deep understanding of the full SoC design flow from microarchitecture definition through RTL design, verification, timing analysis, and physical implementation
- Experience leading DFT implementation on complex SoCs that have taped out and gone to production
- Strong working knowledge of Synopsys DFT tools such as TetraMAX, DFT Compiler, or BIST Architect is a plus
- Demonstrated ability to work with cross-functional teams including design, verification, and physical implementation to resolve testability issues
- Experience supporting post-silicon debug and working with test engineering teams to refine production test programs is a plus
Who You Are
- You can walk into a design review, spot untestable logic in a block diagram, and explain the fix in a way that makes the designer want to implement it
- You are comfortable leading technical discussions with customer architects and pushing back when a design decision will create test coverage gaps or yield risk
- Self-directed and resourceful, you do not wait for perfect information to start defining test architecture or building BIST insertion strategies
- You mentor engineers by working through problems together, not by handing them answers, and you care about their growth as much as the project schedule
- Strong communicator who can translate DFT tradeoffs into business impact for project managers and customer stakeholders
- You stay current on DFT techniques and industry trends because you know that what worked on the last tapeout may not be optimal for the next one
The Team You'll Be Part Of
You will join the Systems Solutions Group (SSG), a team that delivers tool, methodology, architecture, design creation, design verification, and physical implementation expertise to help leading-edge customers complete their most challenging SoC design projects. The work spans from sub-blocks to full turnkey end-to-end SoCs for customers ranging from startups to industry leaders, commercial companies, and government agencies developing SoCs for high-performance computing, automotive, aerospace and defense, and more. This is a customer-facing role where the DFT solutions you build directly enable customer tapeouts and production success.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
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Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
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Time Away
In addition to company holidays, we have ETO and FTO Programs.
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Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
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Retirement Plans
Save for your future with our retirement plans that vary by region and country.
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Compensation
Competitive salaries.
** Benefits vary by country and region - check with your recruiter to confirm
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