Analog Design, Staff Engineer

Analog Design/Layout Engineer 

Synopsys is looking for an Analog Design/Layout Engineer with responsibilities to manage a small team working on Synopsys’ highest speed serial-link transceiver products, supporting Ethernet and PCIe standards.

You will be part of a fast growing analog and mixed signal R&D team, developing high speed analog integrated circuits in the most advanced FinFET process nodes.

You will analyze and review layout implementations, interacting with design and layout teams to improve circuit performance

You’ll interact with a global and cross-functional design team having a wide variety of backgrounds.

Key Qualifications

• Experience on CMOS circuit layout fundamentals, technology effects, analog matching concepts
• Understanding of layout parasitic effects and experience on doing and analyzing results of layout parasitic extractions
• Versatile on automation/scripting languages
• Familiarity with UNIX operating Systems
• Familiarity with one or more IC design packages
• Analysis, problem-solving and organization skills are essential
• Comfortable at multi-tasking moderate complexity tasks
• Good communication skills

Preferred Experience

• 2 or more years of experience in CMOS analog circuit and layout design
• Experience at managing small teams of physical layout designers

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.