Mixed-Signal Verification Engineer

Category Engineering Hire Type Employee Job ID 16090 Remote Eligible No Date Posted 03.29.2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a detail-oriented engineer who thrives in collaborative, cross-disciplinary environments. With expertise bridging digital and analog domains, you are passionate about delivering quality verification results and eager to learn and grow in SERDES technology. You organize and document your work for reproducibility, communicate clearly across teams, and support your peers. Calm under pressure and proactive in improving processes, you bring a learning mindset and a drive to help Synopsys deliver reliable, high-performance silicon solutions.

What You’ll Be Doing:

• Executing mixed-signal CoSim verification tasks for system-level validation across analog and digital domains, following guidance from senior engineers.
• Building and running CoSim simulations using established environments, integrating schematics and RTL, and adhering to procedures for reproducibility and traceability.
• Debugging mixed-signal failures by collecting logs, waveforms, and reproducible steps, performing first-pass triage, and escalating issues with clear evidence to design and verification teams.
• Collaborating with analog and digital designers to confirm expected behaviors, review corner cases, and align verification needs for day-to-day activities.
• Maintaining and improving test content, scripts, and documentation to enhance verification quality and speed.
• Contributing to the overall reliability and performance of SERDES deliverables by surfacing system-level issues and supporting their resolution.

The Impact You Will Have:

• Ensuring system-level validation of SERDES PHYs before tape-out, reducing risk and increasing confidence in deliverables.
• Driving the quality and robustness of mixed-signal verification processes, directly influencing silicon reliability and performance.
• Facilitating effective communication and coordination between analog and digital engineering teams, enabling faster and more accurate issue resolution.
• Improving reproducibility and traceability, supporting compliance and best practices across verification workflows.
• Enhancing the efficiency and speed of verification cycles through proactive script and content improvements.
• Supporting continuous innovation in silicon design and verification, helping Synopsys remain a leader in advanced chip technologies.

What You’ll Need:

• Master’s degree in Electronics Engineering or a related field is required.
• Solid understanding of digital verification fundamentals, including methodology and test planning.
• Proficiency in System Verilog (or similar HDL), with ability to read and modify testbench code with support.
• Familiarity with digital design concepts and ability to interpret RTL behavior in verification contexts.
• Basic knowledge of analog design principles to support debug discussions and interpret results.
• Strong debugging skills, including use of tools, logs, and waveforms to identify and communicate issues.

Who You Are:

• Collaborative and comfortable seeking help and supporting peers.
• Clear and concise communicator with both analog and digital stakeholders, especially when reporting and escalating issues.
• Organized and steady under pressure, able to follow priorities and check work carefully.
• Curious and eager to learn about leading-edge SERDES and mixed-signal verification techniques.
• Proactive in maintaining documentation and improving processes for team efficiency.

The Team You’ll Be A Part Of:

You will join a diverse and innovative engineering team focused on system-level mixed-signal verification of advanced SERDES PHYs. The team collaborates closely across analog and digital domains, leveraging expertise and best practices to ensure high-quality deliverables and robust silicon performance. Together, you’ll help drive the final verification layer before tape-out, making a tangible impact on Synopsys’ technology leadership.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.