RF Analog Design, Staff Engineer

Category Engineering Hire Type Employee Job ID 17245 Remote Eligible No Date Posted 06/10/2026

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years designing analog and mixed-signal circuits that actually work in silicon, not just in corner simulations. You know the difference between a block that tapes out clean and one that needs a respin usually comes down to a layout decision you caught early or an architectural tradeoff you made when the spec was still fluid. You own your designs end to end, from the first schematic through post-silicon correlation in the lab, because you understand that handing off a netlist is not the same as delivering a working product. You are comfortable sitting with a layout engineer to optimize matching and parasitic extraction, then turning around to explain jitter budgets or power tradeoffs to a system architect without losing either conversation. At Synopsys, you will design high-speed SerDes IP that powers data centers, automotive systems, and AI infrastructure, and the problems you solve will matter.

What You'll Be Doing

• Own the design, analysis, and optimization of critical analog and mixed-signal blocks including voltage regulators, DACs, AFE/DFE, TX drivers, serializers, and supporting circuits in advanced CMOS nodes
• Make architectural and circuit-level tradeoffs to meet power, performance, area, and reliability targets while balancing schedule and complexity
• Lead technical collaboration with custom layout teams, guiding floorplanning, matching strategies, shielding, and parasitic-aware design to hit block specifications
• Define and verify testbenches for rigorous pre-silicon validation, covering PVT corners, mismatch, aging, reliability, and yield analysis
• Drive post-layout optimization and sign-off, correlating extracted simulations with design intent and closing timing for small digital blocks using NanoTime
• Execute silicon bring-up, lab characterization, and debug, correlating measurements with simulation results to validate performance and identify design improvements
• Document architectures, design decisions, simulation results, and silicon learnings to ensure clarity, reproducibility, and knowledge transfer across the team

The Impact You Will Have

• Advance Synopsys' leadership in high-speed SerDes IP and analog interface technology deployed across data centers, automotive, and AI applications
• Influence future product architectures and performance standards by driving innovation in design methodologies and circuit techniques
• Enable faster time-to-market for cutting-edge chips by optimizing design cycles, reducing respins, and improving first-pass silicon success
• Improve product robustness and yield through rigorous analysis, testing, and post-silicon correlation that feeds back into design practices
• Strengthen cross-functional collaboration between design, layout, and validation teams, ensuring seamless integration and fewer late-stage surprises
• Mentor engineers on the team, raising the technical bar and building depth in analog and mixed-signal design capability
• Contribute to a culture of technical excellence and continuous improvement within Synopsys' engineering community

What You'll Need

• MS or PhD in Electrical Engineering, Electronics Engineering, or equivalent, with typically 7+ years of analog/mixed-signal IC design experience or demonstrated Staff-level impact
• Deep expertise in analog and mixed-signal circuit design in deep sub-micron CMOS, with strong understanding of signal integrity, noise, jitter, and high-speed interface challenges
• Proven experience making architectural tradeoffs and owning complex blocks from concept through production silicon
• Strong collaboration skills with custom analog layout teams, including hands-on experience with matching, shielding, parasitic control, and EM/IR considerations
• Production silicon experience, including lab bring-up, characterization, and debug, with ability to correlate measurements to simulation and drive design improvements
• Excellent communication skills and ability to influence across multidisciplinary teams, from layout engineers to system architects
• Experience with timing analysis, digital/AMS interaction, and post-layout optimization is a strong plus

Who You Are

• You can explain a complex circuit tradeoff to a system architect in two sentences without losing the technical nuance, then turn around and walk a layout engineer through a critical matching constraint with equal clarity
• Detail-oriented and quality-focused, you catch the subtle issues during design reviews that save weeks of debug later, whether it is a biasing edge case or a parasitic path that will kill bandwidth
• You take ownership without needing to be asked, when something is unclear or a dependency is blocking progress, you find the right person, ask the right questions, and move the design forward
• Adaptable and resilient, you thrive in environments where requirements evolve, process nodes push boundaries, and the path from architecture to silicon is rarely linear
• You mentor naturally, sharing insights from past tapeouts, lab sessions, or tricky simulations in ways that help others grow without slowing your own work down

The Team You'll Be Part Of

You will join the IP and System Solutions Group, specifically the RF & Analog IC Design / Mixed-Signal High-Speed SerDes team. This is a diverse, international group dedicated to innovation at the forefront of semiconductor technology, delivering high-speed interface IP deployed across a wide range of applications and technology nodes. The team collaborates closely across design, layout, and lab validation disciplines, sharing expertise and insights to deliver industry-leading products. You will work alongside experts in architecture, circuit design, layout, and system integration in a supportive, inclusive environment where curiosity and technical excellence are celebrated.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.