ASIC Digital Design, Staff Engineer
Overview
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
Job Description
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Digital IP Design, Staff Engineer
Seeking a highly motivated and innovative digital design engineer with knowledge of DDR and wide-spectrum knowledge of generic IP design methodology.
The candidate would be working as part of a highly experienced DDR controller design and verification team, targeting the current and next generation DDR technology, such as HBM4, DDR5, LPDDR5. Solid theoretical and practical background in AXI, CHI, CRYPTO and RAS is a solid plus.
The position offers an excellent opportunity to work with a professional team of digital engineers responsible for delivering high-end designs from specification development to performing functional design, performance tests down to successful IP releases.
The controller IP development is very dynamic and provides an endless list of challenges. This work is very challenging, not only given the constant technological changes but also given the ownership and the need to charter unknown waters.
Does this sound like a good role for you?
Key Qualifications
- MSEE plus a minimum of 5 years of digital design experience in the industry
- Study standard specifications published by JEDEC, define micro architecture at block level based on IP architecture
- Work on RTL design based on predefined coding style, SVA is also included, clean RTL check violations in lint, CDC, DFT and synthesis
- Work with verification team to debug and fix RTL issues
- Good knowledge of back-end synthesis tools DC/PT is required
- Must be self-motivated, proactive, and able to balance good design quality while meeting tight deadlines
- May guide more junior peers with aspects of their job. Networks with senior internal and external personnel in own area of expertise
- Good communication skills for interacting between different design groups and customer support teams are required
- Has strong desire to learn and explore new technologies
- Demonstrates good analysis and problem-solving skills
- Knowledge in interface technologies such as DDR, HBM, PCIe is a plus
- Knowledge in AMBA protocols is a plus
- good experience is co-working with UVM-based verification is a plus
- Scripting experience in Shell, Perl, Python and TCL is a plus
- Interacting with Application Engineers for customer support.
Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
-
Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
-
Time Away
In addition to company holidays, we have ETO and FTO Programs.
-
Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
-
Retirement Plans
Save for your future with our retirement plans that vary by region and country.
-
Compensation
Competitive salaries.
** Benefits vary by country and region - check with your recruiter to confirm
Hiring Journey at Synopsys
Find the open role that’s
right for you
- ASIC Digital Verification, Principal Engineer Bengaluru, India
- EMEA People Shared Services Manager Porto Salvo, Portugal
- R&D Engineering, Staff Engineer - VIP Verification Delhi, India
- ASIC Digital Design, Sr Engineer Wuhan, China
View all job opportunities here
View all job opportunities here
An award-winning culture powered by
our world class team
Explore the Possibilities
with Synopsys
Follow #lifeatSynopsys