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Design Architect (PCIe/CXL Expert)

Shanghai, Shanghai Municipality, China
Engineering
Employee
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Overview

Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development.

Job Description

Date posted 02/24/2026

Category Engineering Hire Type Employee Job ID 15245 Date Posted 02/24/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.


You Are:

You are a visionary and highly experienced logic design expert with a passion for building next-generation hardware solutions. With a strong foundation in PCI Express (PCIe) and/or Compute Express Link (CXL) protocols, you thrive in challenging technical environments, pushing the boundaries of what’s possible in high-speed, complex SoC-class platforms. Your background combines deep hands-on expertise in FPGA architecture, RTL design, and hardware validation, making you a go-to leader for mission-critical projects. You excel at architecting robust, production-quality subsystems and are adept at navigating the intricacies of hardware/software co-design and debugging.

You are a natural collaborator and mentor, able to bridge the gap between technical and non-technical stakeholders. Your global perspective and excellent communication skills enable you to work seamlessly with cross-functional teams and customers around the world. You are energized by opportunities to lead, whether it’s guiding feature rollouts, solving tough engineering challenges, or supporting cutting-edge customer deployments. Always eager to learn and adapt, you stay at the forefront of industry advances in FPGA, high-speed protocols, and system design. Your commitment to quality, innovation, and continuous improvement sets you apart as a leader in your field.


What You’ll Be Doing:

  • Architecting, designing, and implementing PCIe/CXL-based FPGA subsystems for advanced SoC emulation and prototyping platforms.
  • Developing and optimizing RTL code for Xilinx UltraScale, UltraScale+, and Versal FPGAs, ensuring high performance and efficient resource usage.
  • Designing and integrating high-speed serial interfaces, DMA engines, memory/cache-coherent protocols, and complex system interconnects.
  • Leading hardware validation and debugging activities across both hardware and software domains to deliver robust, production-quality solutions.
  • Collaborating with R&D, Applications, Field Engineering, and Marketing teams to gather requirements, define features, and support global customer deployments.
  • Driving alpha/beta feature rollout, providing expert technical support, and ensuring successful adoption of ZeBu/HAPS platforms by customers worldwide.


The Impact You Will Have:

  • Enabling industry-leading SoC emulation and prototyping platforms that accelerate time-to-market for Synopsys customers.
  • Delivering high-performance, reliable hardware solutions that set benchmarks in PCIe/CXL protocol integration and validation.
  • Enhancing the capabilities of ZeBu and HAPS platforms, empowering semiconductor companies to innovate faster and more efficiently.
  • Driving adoption of advanced emulation technologies across AI, server, storage, and data center markets.
  • Mentoring and guiding engineering teams, fostering a culture of technical excellence and innovation.
  • Building lasting partnerships with global customers by providing expert-level support and thought leadership in high-speed protocol design


What You’ll Need:

  • Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or related field.
  • 12+ years of experience in ASIC/FPGA logic design for complex SoC-level systems.
  • Expert-level knowledge of PCIe (Gen4–Gen6) and/or CXL (1.1/2.0/3.0) protocols, including link training, TLP/CXL.io/cache/mem, flow control, and error handling.
  • 7+ years of hands-on Xilinx FPGA experience, including transceiver/SERDES integration and FPGA prototyping flows.
  • Strong proficiency in RTL development (SystemVerilog/Verilog) and comprehensive understanding of the hardware development cycle (simulation, synthesis, timing analysis).
  • Solid grasp of FPGA architecture, clocking/reset design, CDC, and debugging high-speed interfaces.
  • Experience in Unix/Linux development environments.


Who You Are:

  • Collaborative team player with excellent communication skills and a global mindset.
  • Proactive problem solver who thrives in dynamic, fast-paced environments.
  • Strong technical leader and mentor, passionate about sharing knowledge and guiding teams.
  • Detail-oriented, self-motivated, and committed to delivering high-quality, reliable solutions.
  • Adaptable and eager to stay updated with the latest industry trends and technologies.
  • Customer-focused, with a dedication to supporting and enabling client success.


The Team You’ll Be A Part Of:

You will join a world-class, multidisciplinary engineering team passionate about developing state-of-the-art emulation and prototyping solutions. The team values technical excellence, innovation, and collaboration, working closely with global colleagues in R&D, customer support, and product management. Together, you will tackle some of the most complex challenges in hardware design, driving the future of high-speed, scalable SoC platforms for leading-edge industries.


Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

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Hiring Journey at Synopsys

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As an applicant your resume, skills, and experience are being reviewed for consideration.

Phone Screen

Once your resume has been selected a recruiter and/or hiring manager will reach out to learn more about you and share more about the role.

Interview

You will be invited to meet with the hiring team to measure your qualifications for the role. Our interviews are held either in person or via Zoom.

Offer

Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept!

Onboarding

There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation.

Welcome!

Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

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