Principal Analog Design Engineer
Overview
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
Job Description
We Are: |
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. |
You Are: |
You are a highly skilled and innovative Analog Designer with a passion for creating cutting-edge technology. With extensive experience in analog circuit and high speed IO interface PHY design, you have a strong foundation in analog circuits, system modeling, system margin, and jitter analysis. Your expertise in designing and developing physical IP, such as SERDES, DDR/HBM, PLL and Die to Die IO interfaces, sets you apart. You thrive in a dynamic environment, working independently on new and special assignments. You possess excellent communication skills, allowing you to effectively collaborate with cross-functional teams and present your ideas clearly. Your deep knowledge and experience enable you to contribute significantly to organizational objectives and drive the success of the projects you work on. |
What You’ll Be Doing: |
Review UCIe and other D2D standards to develop novel transceiver architectures and sub-block specifications. |
Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area and performance targets. |
Designing, developing, and evaluating analog circuits of the fast-growing high-speed Die to Die interconnect IP portfolio |
Conducting system modeling, system margin analysis, and jitter analysis to ensure robust and high-performance designs |
Work across geography, project, department teams to streamline design and verification strategies ensure overall design quality, efficiency and performance. |
Oversee PHY level physical layout to minimize the effect of parasitics, device stress, and process variation. |
Present & review simulation data from internal project teams. Present results externally at industry panels or at customer reviews. |
Document design features and test plans. |
Consult on the overall electrical characterization of the D2D IP product. Analyze customer silicon data for design enhancements. Propose solutions for post-silicon design updates. |
Collaborating with cross-functional cross-geo teams to define design specifications and requirements, and enable prompt what-if system level analysis from customer |
Mentor and train highly matrixed global design team members to build best in class Die to Die Interconnect solutions across technology nodes |
Conducting design reviews and providing technical guidance to junior engineers in highly matrixed global design organization |
Staying updated with the latest industry trends and technological advancements to incorporate innovative solutions into your designs. |
The Impact You Will Have: |
Driving the development of world class high-performance D2D IPs to enable customer chiplet bases system design across industries |
Enhancing the KPI of die-to-die Interconnect IP, contributing to the overall quality of our solutions. |
Providing technical leadership and guidance to junior engineers, fostering a culture of innovation and excellence. |
Collaborating with cross-functional teams to achieve project milestones and deliver high-quality products on time. |
Contributing to the continuous improvement of our design processes and methodologies. |
Playing a key role in advancing our technological capabilities and maintaining our competitive edge in the market. |
What You’ll Need: |
PhD with 10+ years, or MSc with 12+ years of practical analog IC design experience; degree in Electrical Engineering or Computer Engineering or other relevant field of study. |
Experience with FinFET technologies |
Extensive design experience with sub-circuits relevant to Memory/SerDes/D2D: |
Receive equalizers such as CTLE, DFE, FFE |
DAC Based transmitters and ADC based receivers, DSP equalization |
High speed clocking circuits such as PLL, VCO, ILO, DLL and phase interpolator |
Duty Cycle Correction, Clock Phase Correction Circuits |
Digitally Assisted Analog Calibration Loops |
In depth familiarity with transistor level circuit design - sound CMOS design fundamentals, experience with CMOS tape-outs |
Knowledge of high speed SerDes/Memory/D2D IO, circuit and fabrication issues that directly impact customer use-cases. |
Aware of ESD issues (i.e. circuit techniques, layout). |
Familiarity with custom digital design (i.e. high-speed logic paths, Serializer, De-serializer). |
Experience with analog/digital interactions for optimizing circuit performance (calibration, adaptation, timing-handoff, etc.) |
Knowledge of design for reliability (i.e. EM, IR, aging, self-heating, etc.) and layout effects (i.e. matching, reliability, proximity effects, etc.). |
Experience with tools for schematic entry, physical layout, and design verification. |
Knowledge of SPICE simulators and simulation methods. |
Experience with TCL, Perl, C, Python, MATLAB, or other scripting languages is desired. |
Excellent communication, presentation, and documentation skills |
Who You Are: |
A highly motivated and innovative engineer with a passion for analog circuit design. |
Strong customer orientation and collaborative mindset, collaboration experience with matrixed global teams |
An excellent communicator who can effectively collaborate with cross-functional teams. |
A detail-oriented professional with a strong focus on quality and reliability. |
A proactive learner who stays updated with the latest industry trends and technological advancements. |
A team player who fosters a culture of innovation and excellence. |
The Team You’ll Be A Part Of: |
You will be part of a dynamic and highly skilled team of engineers dedicated to designing and developing cutting-edge analog circuits. Our team is focused on delivering high-performance physical IP solutions that drive the success of our products. We collaborate closely with cross-functional teams to define design specifications, conduct design reviews, and ensure the highest quality of our solutions. Join us to be part of a team that values innovation, excellence, and continuous improvement. |
Rewards and Benefits: |
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. |
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.
Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
-
Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
-
Time Away
In addition to company holidays, we have ETO and FTO Programs.
-
Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
-
Retirement Plans
Save for your future with our retirement plans that vary by region and country.
-
Compensation
Competitive salaries.
** Benefits vary by country and region - check with your recruiter to confirm
Hiring Journey at Synopsys
Find the open role that’s
right for you
- Project Engineering Manager, Sr Staff Kanata, Canada
- Senior Staff Analog Design Engineer Bhubaneswar, India
- Technical / Product Publications, Staff Engineer Bengaluru, India
- R&D Engineer, Architect-7707 Sunnyvale, California
View all job opportunities here
View all job opportunities here
An award-winning culture powered by
our world class team
Explore the Possibilities
with Synopsys
Follow #lifeatSynopsys