Principal Analog Design Engineer
Overview
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
Job Description
We Are: |
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. |
You Are: |
You are a passionate and skilled Analog Design Engineer with a strong background in designing, developing, and evaluating physical IP such as SERDES, DDR, or Memory. You thrive in a dynamic environment and are eager to take on new challenges with minimal supervision. Your expertise in clocking, DCC, and deskew technologies is unparalleled, and you are well-versed in the full SOC Design Cycle with a focus on Physical Design. You possess a keen eye for detail and are committed to delivering high-quality results that drive innovation and success. |
As an excellent communicator, you effectively collaborate with cross-functional teams and influence decision-making processes. You are adept at evaluating complex issues and providing innovative solutions that align with strategic goals. Your extensive knowledge and experience in analog design make you a valuable asset to our team, and you are motivated by the opportunity to contribute to cutting-edge technological advancements. |
What You’ll Be Doing: |
Review UCIe and other D2D standards to develop novel transceiver architectures and sub-block specifications. |
Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area and performance targets. |
Designing, developing, and evaluating analog circuits of the fast-growing high-speed Die to Die interconnect IP portfolio |
Conducting system modeling, system margin analysis, and jitter analysis to ensure robust and high-performance designs |
Work across geography, project, department teams to streamline design and verification strategies ensure overall design quality, efficiency and performance. |
Oversee PHY level physical layout to minimize the effect of parasitics, device stress, and process variation. |
Present & review simulation data from internal project teams. Present results externally at industry panels or at customer reviews. |
Document design features and test plans. |
Consult on the overall electrical characterization of the D2D IP product. Analyze customer silicon data for design enhancements. Propose solutions for post-silicon design updates. |
Collaborating with cross-functional cross-geo teams to define design specifications and requirements, and enable prompt what-if system level analysis from customer |
Mentor and train highly matrixed global design team members to build best in class Die to Die Interconnect solutions across technology nodes |
Conducting design reviews and providing technical guidance to junior engineers in highly matrixed global design organization |
Staying updated with the latest industry trends and technological advancements to incorporate innovative solutions into your designs. |
The Impact You Will Have: |
Driving the development of high-performance physical IP that powers next-generation technologies. |
Ensuring the reliability and efficiency of clocking, DCC, and deskew solutions in our products. |
Contributing to the success of Synopsys' strategic goals through innovative design solutions. |
Enhancing the capabilities of our products and platforms through expert technical insights. |
Fostering a culture of continuous improvement and excellence within the engineering team. |
Supporting the adoption and usability of our products by providing top-tier engineering expertise. |
What You’ll Need: |
PhD with 10+ years, or MSc with 12+ years of practical analog IC design experience; degree in Electrical Engineering or Computer Engineering or other relevant field of study. |
Experience with FinFET technologies |
Extensive design experience with sub-circuits relevant to Memory/SerDes/D2D: |
Receive equalizers such as CTLE, DFE, FFE |
DAC Based transmitters and ADC based receivers, DSP equalization |
High speed clocking circuits such as PLL, VCO, ILO, DLL and phase interpolator |
Duty Cycle Correction, Clock Phase Correction Circuits |
Digitally Assisted Analog Calibration Loops |
In depth familiarity with transistor level circuit design - sound CMOS design fundamentals, experience with CMOS tape-outs |
Knowledge of high speed SerDes/Memory/D2D IO, circuit and fabrication issues that directly impact customer use-cases. |
Aware of ESD issues (i.e. circuit techniques, layout). |
Familiarity with custom digital design (i.e. high-speed logic paths, Serializer, De-serializer). |
Experience with analog/digital interactions for optimizing circuit performance (calibration, adaptation, timing-handoff, etc) |
Knowledge of design for reliability (i.e. EM, IR, aging, self-heating, etc.) and layout effects (i.e. matching, reliability, proximity effects, etc.). |
Experience with tools for schematic entry, physical layout, and design verification. |
Knowledge of SPICE simulators and simulation methods. |
Experience with TCL, Perl, C, Python, MATLAB, or other scripting languages is desired. |
Excellent communication, presentation, and documentation skills |
Who You Are: |
A proactive and independent worker with minimal need for supervision. |
An effective communicator with the ability to influence and collaborate with cross-functional teams. |
A strategic thinker who can evaluate complex issues and provide innovative solutions. |
A dedicated professional committed to continuous improvement and excellence. |
A passionate engineer driven by the opportunity to contribute to cutting-edge technologies. |
The Team You’ll Be A Part Of: |
You will be part of a highly skilled and motivated team focused on analog design and physical IP development. Our team is dedicated to driving innovation and delivering high-performance solutions that power the technologies of tomorrow. We collaborate closely with cross-functional teams to ensure the successful integration and verification of our designs, and we are committed to continuous improvement and excellence in everything we do. |
Rewards and Benefits: |
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. |
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.
Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
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Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
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Time Away
In addition to company holidays, we have ETO and FTO Programs.
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Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
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Retirement Plans
Save for your future with our retirement plans that vary by region and country.
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Compensation
Competitive salaries.
** Benefits vary by country and region - check with your recruiter to confirm
Hiring Journey at Synopsys
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