We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

The ideal candidate for the Senior Staff R&D Engineer position is a highly skilled and experienced professional with a passion for cutting-edge technology and innovation. You possess extensive knowledge in RTL design, architecture, and implementation of subsystems, and are proficient in one or more protocols such as AMBA (APB, AXI, CHI), DDR, PCIe, Ethernet, USB, and UFS. Your programming skills in System Verilog, TCL, Perl, or Python are exceptional, and you have a proven ability to work independently while driving innovation. Clear and efficient communication skills are essential, as you will be collaborating with various teams and stakeholders. You thrive in a dynamic environment, can extract detailed requirements from high-level specifications, and are dedicated to delivering high-quality solutions. Your leadership skills enable you to guide and mentor others, ensuring the successful completion of complex projects.

What You’ll Be Doing:

• Understanding the requirements and architecting the subsystems based on those requirements.
• Integrating the RTL and driving the design tasks to complete the subsystem.
• Signing off on front-end implementation flows such as synthesis timing closure using DC/Fusion Compiler, SpyGlass CDC/RDC checks, low power architecture, formality, and others.
• Leading the verification closure by interacting with the verification teams.
• Driving the lifecycle of the subsystems through various phases, from requirements to delivery.
• Collaborating with cross-functional teams to ensure seamless integration and functionality.

The Impact You Will Have:

• Leading subsystem projects involving the latest protocol IPs, enabling IP business growth.
• Acting as a bridge between customers and IP R&D teams, providing solutions and helping customers meet their time-to-market goals.
• Contributing to the development of cutting-edge technologies that shape the future of the semiconductor industry.
• Driving innovation and ensuring high-quality deliverables that meet industry standards.
• Enhancing the efficiency and effectiveness of the design and verification processes.
• Mentoring and guiding junior engineers, fostering a culture of continuous learning and improvement.

What You’ll Need:

• BSEE/MSEE with 10+ years of industry hands-on experience with subsystems/SOC design, architecture, and implementation.
• Proficiency in Verilog/System Verilog coding and simulation tools.
• Experience with implementation flows, including synthesis, lint, CDC, and low power.
• Strong programming skills in System Verilog, TCL, Perl, or Python.
• In-depth knowledge of protocols such as AMBA, DDR, PCIe, Ethernet, USB, and UFS.

Who You Are:

• Innovative thinker with a passion for technology and problem-solving.
• Excellent communicator, able to convey complex ideas clearly and effectively.
• Detail-oriented and precise in your work, ensuring high-quality outputs.
• Independent and proactive, capable of driving projects to completion with minimal supervision.
• Collaborative team player, willing to work with others to achieve common goals.

The Team You’ll Be A Part Of:

You will be part of the IP Subsystem team, which focuses on providing customers with cutting-edge technology IP solutions and speeding up the SOC integration process. This team acts as an enabler for Synopsys' IP business, driving innovation and ensuring that our solutions meet the highest standards of quality and performance.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.