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R&D Engineering, Sr Architect

pin icon Sunnyvale, California, United States Apply Now
Category: Engineering Hire Type: Employee
Job ID 8965 Base Salary Range $212000-$318000 Date posted 02/26/2025


You Are:

You are a proven technology leader in your domain. You are collaborative, innovative, harbor a strong passion for technology, and are motivated by complex problems. You are always seeking new ways to improve. Your technical expertise, combined with your creative problem-solving abilities, makes you an invaluable asset to our team. With a strong understanding of digital logic design, FPGA architecture, and hardware description languages, you are well-equipped to tackle the challenges of this role. Experience in EDA, algorithm design, and even machine learning would be highly advantageous.

What You’ll Be Doing:

  • Innovating and brainstorming ideas alongside senior architects to solve challenging practical problems faced by our customers.
  • Providing technical leadership and guidance to junior members of the team.
  • Participating in deployment / tuning of ZeBu on industrial designs, engaging with field and validation teams to demonstrate value of the technology built by our team.
  • Developing software based on innovative ideas and demonstrating their effectiveness through benchmarking designs.
  • Collaborating with a global multi-site team specializing in Behavioral compiler and DPI, Clock Processing, Timing Analysis, Performance Tuning, and Runtime Throughput.
  • Engaging in continuous learning and application of new technologies to improve existing systems.

The Impact You Will Have:

  • Driving innovation and solving complex problems that enhance our technology offerings.
  • Providing technical leadership that guides and inspires junior team members.
  • Developing and implementing software solutions that lead to improved performance and efficiency.
  • Enhancing the Zebu emulation flow, contributing to the validation of SoC designs up to 60 billion gates.
  • Ensuring the highest possible hardware throughput for testbenches used in design validation.
  • Promoting a culture of continuous improvement and technological advancement within the team.

What You’ll Need:

  • MS/Ph.D. Degree in Computer Science, Computer Engineering, or Electrical Engineering.
  • 10+ years of software development experience in developing large C++ applications in a Linux environment.
  • Ability to understand complex problems and propose creative and efficient solutions.
  • Experience with efficient algorithm and data structure design.
  • Understanding of digital logic design, FPGA architecture, and hardware description language (like Verilog, System Verilog).
  • EDA knowledge preferred, especially in partitioning, place-and-route, static timing analysis, synthesis or timing closure for large capacity and high-performance designs.
  • Machine learning experience is preferred but not mandatory.

Who You Are:

You are a collaborative and innovative engineer with a passion for technology. Your highly developed interpersonal skills enable you to work effectively in both team environments and autonomously. You are motivated by solving complex problems and are always seeking new ways to improve and innovate. Your technical expertise, combined with your creative problem-solving abilities, makes you an invaluable asset to our team.

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

The Team You’ll Be A Part Of:

The ZeBu family of emulators can support SoC designs as large as 60 billion gates. In the ZeBu flow, the design is partitioned and mapped into low-level bit-streams that can be downloaded and run on FPGAs in the emulation hardware. This compilation is done in a way that achieves the highest possible hardware throughput for the testbenches used to validate the design.  Performance is the key differentiator of our tool in the emulation industry. You will be joining the performance team of ZeBu. This team focuses on various areas of the compiler which are critical for performance, with significant responsibilities around DPI and clock processing.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.

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