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Senior Applications Engineer (ASIC / UCIe IP Design)

pin icon Sunnyvale, California, United States Apply Now
Category: Engineering Hire Type: Employee
Job ID 49468BR Base Salary Range $154,000-$230,000 Date posted 04/01/2024
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

UCIe Applications Engineer

This position requires a highly motivated and experienced person to work with Synopsys’ customers on integrating leading edge Interface IP (IIP) into their ASIC SoC/systems for next generation products.

The position offers opportunities to work on Synopsys UCIe (Universal Chiplet Interconnect Express) IP and the latest industry specifications/applications on various hot market segments. The position will provide UCIe IP integration guidance to customers throughout their SoC flow to resolve technical challenges, perform integration reviews at key milestones and support silicon/system bring-up. Some travels will be required.

Responsibilities Include
  • Understand about IIP applications on customer specific SoC and systems
  • Keep abreast of the latest ASIC/SoC design flows and EDA tools
  • Provide professional advice and support to configure and resolve IIP integration challenges including simulation, synthesis, floorplan, STA, DFT, silicon bring-up, etc.
  • Provide integration training to customers and conduct reviews on their major SoC milestones
  • Partner with R&D to produce application notes on advance topics
  • Provide pre-sales support on IIP integration and support conference demos
  • Provide feedback to Synopsys R&D for continuous IIP product improvements
  • Participate in R&D design reviews to align development with future customer needs 

Key Qualifications
  • Bachelor's and/or Master's degree in Electrical Engineering, Computer Engineering Computer Science, or related fields
  • Typically requires at least 8 years of design, verification, or applications experience
  • Hands-on experience on ASIC Front-End or Back-End development
  • Attention to detail and high degree of self-motivation
  • Proven methodical, reasoning, and problem-solving skills
  • Proven verbal and written communication skills

Preferred Experience
  • Experience with advanced technology processes (10nm/7nm/5nm/3nm) mixed signal IP or circuit design, implementation or technical support
  • Domain knowledge in Die-to-Die and PCIe/CXL protocol are highly desirable
  • Silicon and/or FPGA/hardware debug and troubleshooting skills
  • Knowledge of advanced EDA tool products and product knowledge in any of the areas of P&R, Physical Verification, Signal Integrity/Power Integrity
* Salary will be commensurate with experience.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
The base salary range across the U.S. for this role is between $154,000-$230,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.
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Synopsys Hiring Process 1. Apply. As an applicant, your resume, skills, and experience are being reviewed for consideration. 2. Phone screen. Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you and share more about the role. 3. Interview. You will be invited to meet with the hiring team to measure your qualifications for the role. Our interviews are held either in person or via zoom. 4. Offer. Congratulations! You have been selected as a finalist; your recruiter will reach out to propose your offer details. A written offer will soon follow. 5. Onboarding. You will be invited to complete new hire documents to ensure you are set-up and prepared for your first day. 6. Welcome. Your hiring manager, team, and an assigned buddy will help you get acclimated. Over the next few weeks, you will receive communications and engagement invitations that will help ramp you up for your future at synopsys

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