Synopsys is looking for motivated Product Engineer to help develop state of the art Static Timing, Characterization and Library modelling tools.

The primary focus of the Product Engineer is closely working with R&D team, to influence technologies/solution roadmaps and provide R&D team with accurate input from Field AEs, helping them focus on the most critical design challenges and help define solutions to critical problems.

The engineer will work closely with Field AEs, ensuring overall consistency of end-to-end design and analysis flow to meet customer needs. The engineer will also work with Sales and Marketing teams to find and develop new markets, drive new tool evaluations and help customers with the adoption and continuous usage of Static Timing, Characterization and Library Modelling, thus enabling Chip Design customers achieve best Timing, Power and Characterization Goals. 

Synopsys’ existing and forthcoming tools offer an advanced transistor-level static timing characterization and library modelling solution that addresses the existing and emerging challenges in custom and memory design. They offer predictability and improved productivity to designers. Their concurrent timing, SI features and advanced variation aware analysis enables designers to accurately and quickly identify design issues early-on and avoid expensive late-finding of problems in silicon.

Main responsibilities:

• Drive new products and new product features that exceed customer needs.
• Work with RnD to enable timely implementation of new products and features, and important bug fixes.
• Provide consultation to prospective users and/or product capability assessment and validation. 
• Provide tool trainings to customers and Field AEs.
• Provides technical expertise to sales staff through sales presentations and product demonstrations.
• Assists the sales staff in assessing potential application of company products to meet customer needs and preparing detailed product specifications for the development and implementation of customer applications/solutions. 

Requirements:

We are looking for an innovative, motivated, and dependable person, with at least BS degree and 5 years of recent hands-on experience including: 

• Exceptional expertise in transistor-level analysis and debug circuit level issues for SRAM, RF, ROM memories and Standard Cells.
• Good exposure to static timing concepts and CMOS engineering fundamentals.
• Good knowledge of TCL and or other scripting languages.
• Very good communication and social skills.

Plus: