Join us as an Analog and Mixed-Signal Design Engineering Intern in the PLL design team. Our designs enable the next generation of datacenters, automobiles and communications networks. Our design environment is best-in-class with a full suite of IC design tools, supplemented by custom in-house tools, and supported by an experienced software/CAD team.

What you will learn:

* Working as part of a highly experienced mixed signal design team, you will gain practical experience in many aspects of high-end SERDES and PLL designs including (but not limited to):
* PLL system and noise analysis concepts - Contributing to the PLL system model (Knowledge in Python and/or Matlab is an asset)
* Simulating and optimizing the performance of analog and mixed-signal circuits
* High speed logic and clock path design, optimization and verification
* Electromigration (EM), IR drop (IR) and aging analysis on high-performance circuits

* Collaboration opportunities with best-in-class EDA (Electronic Design Automation) tools and CAD tools developments/enhancements

Skill Requirements:
* We're looking for motivated and curious individuals that are interested in integrated circuit technology
* You possess excellent knowledge of CMOS principles and circuit theory
* You have taken (or taking) courses related to analog circuits, control theory, digital circuits
* You are proficient in scripting languages such as Python, Perl and/or shell scripts

Education Requirements:

Must currently be a 3rd or 4th year student enrolled in a Bachelor’s Program specializing in Electrical/Computer Engineering, or similar

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.