We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years in the lab, not just running tests but actually understanding what the waveforms are telling you about what went wrong three layers down in the design. You know that bringing up a new test chip is equal parts methodical process and creative problem solving, and you are the kind of engineer who can look at an eye diagram, spot the anomaly, and trace it back to a PLL configuration or a firmware timing issue without needing someone to hold your hand.

You are comfortable working at the intersection of digital and analog, moving between oscilloscope measurements and Python scripts without losing sight of what you are actually validating. When a senior engineer gives you high-level direction, you take it from there. You ask the right questions, set up the test, document what you find, and flag what does not make sense. You do not wait for perfect documentation or a fully debugged setup. You work with what you have, iterate, and move forward.

At Synopsys, you will work on DDR and HBM PHY test chips that power memory interfaces in some of the most demanding semiconductor applications in the world. The team is collaborative, the problems are real, and what you validate today ships in customer products tomorrow.

What You'll Be Doing

• Bring up next-generation DDR and HBM PHY test chips under the guidance of senior lab engineers, working through functionality issues until the hardware operates as designed
• Create and execute tests to verify and optimize hardware training firmware, ensuring the PHY meets performance targets across operating conditions
• Develop test plans and perform electrical characterization, including time-domain signal capture, eye diagrams, jitter analysis, and validation against design specifications
• Debug silicon and supporting hardware using oscilloscopes, logic analyzers, and mixed-signal measurement tools, documenting findings and generating characterization reports
• Write Python and C code to automate test sequences, collect data, and process results for analysis
• Assist with PCB design review, lab equipment selection, and maintenance to support ongoing validation work
• Collaborate with digital and analog design teams to communicate test results, troubleshoot issues, and provide feedback that informs next-generation PHY development

The Impact You Will Have

• Enable Synopsys to ship high-performance DDR and HBM PHY IP that meets customer specifications and performs reliably in production silicon
• Catch design issues early in the validation cycle, reducing costly respins and accelerating time to market for next-generation memory interfaces
• Build a library of test scripts, methodologies, and characterization data that the team will reuse across multiple PHY projects
• Provide direct feedback to design teams that improves firmware robustness, analog performance, and digital timing closure
• Help customers resolve integration issues by validating performance under real-world operating conditions and documenting reproducible test cases
• Strengthen lab capabilities by contributing to equipment selection, setup optimization, and best practices for mixed-signal validation
• Support a multi-project team that depends on your ability to work autonomously, document thoroughly, and move validation forward without constant oversight

What You'll Need

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with at least 2 years of hands-on hardware validation experience in a lab environment
• Strong proficiency in Python and C for hardware test automation, data collection, and post-processing
• Experience setting up and taking electrical measurements using oscilloscopes, logic analyzers, and signal integrity tools, including time-domain capture, eye diagrams, and jitter analysis
• Solid understanding of mixed-signal system components such as PLLs, DLLs, DACs, and state machines, and how they interact in high-speed memory interfaces
• Demonstrated ability to debug silicon and hardware issues methodically, trace root causes across digital and analog domains, and document findings in written reports
• Familiarity with DDR or HBM test concepts and communication interfaces such as JTAG and I2C is a strong plus
• Experience analyzing verification or simulation waveforms to correlate lab results with design intent is a plus

Who You Are

• You can take high-level direction from a senior engineer and turn it into a working test setup, a set of results, and a clear summary of what you learned without needing step-by-step instructions
• You are comfortable working in the lab for extended periods, setting up equipment, running tests, and iterating on configurations until you get clean, repeatable data
• You can explain a timing violation or a signal integrity issue to a design engineer in a way that is specific enough to be actionable, not just "it did not work"
• You are organized enough to manage multiple test configurations, document results as you go, and keep track of what worked, what did not, and why
• You do not get stuck when documentation is incomplete or a test setup behaves unexpectedly. You troubleshoot, ask the right questions, and find a path forward
• You are curious about how things work at the circuit level and you use that curiosity to dig deeper when something does not match expectations

The Team You'll Be Part Of

You will join a multi-person engineering team focused on DDR and HBM PHY validation across Synopsys IP development projects. The team is collaborative and supportive, with senior engineers who provide guidance and mentorship as you take on increasing responsibility for test chip bring-up, characterization, and customer support. The work spans multiple PHY generations and process nodes, and you will have the opportunity to contribute to projects that directly impact Synopsys customers building cutting-edge memory subsystems.