We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years deep in semiconductor design flows and you know that the difference between a chip that tapes out on schedule and one that slips six months often comes down to someone who can read a timing report, spot the real bottleneck, and know exactly which knob to turn. You are the engineer who gets called when a customer's SoC is failing signoff at 3nm and the pressure is on.

You do not just run tools, you understand what is happening under the hood. When a PDN analysis flags a voltage drop issue or a timing path refuses to close, you can triangulate the root cause across multiple domains without needing someone to hold your hand. You have worked with PrimeTime, RedHawk, or similar signoff tools enough to know their quirks, their strengths, and when to push back on a result that does not make sense.

Working directly with customers energizes you. You like the mix of technical problem solving and human communication, the moment when a frustrated design team finally sees the path forward because you helped them connect the dots. You are comfortable in ambiguity, whether that means incomplete data from a customer or a tool behavior that does not match the documentation.

At Synopsys, you will work with the semiconductor companies pushing the boundaries of what is possible, and the solutions you deliver will directly affect whether their next chip works.

What You'll Be Doing

• Deploy and support Synopsys signoff tools including PrimeTime, RedHawk-SC, PrimeClosure, PTECO, Tweaker, and StarRC for customers designing advanced SoCs and 3DICs at leading-edge nodes
• Engage directly with semiconductor design teams, IP providers, and foundries to diagnose and resolve STA, power integrity, signal integrity, and reliability challenges across chip, package, and system
• Work alongside Synopsys product development teams to translate customer pain points and design requirements into actionable product enhancements and new capabilities
• Own technical customer issues from initial report through resolution, coordinating across internal teams and delivering solutions that meet design schedules and quality targets
• Provide expert consultation on power distribution network analysis, static timing closure, and reliability signoff, helping customers navigate complex tradeoffs at 5nm, 3nm, and beyond
• Build and document EDA best practices, technical solutions, and FAQs for internal knowledge bases and customer-facing resources
• Support presales technical activities, including proof-of-concept deployments, benchmarking, and technical presentations that demonstrate the value of Synopsys solutions in live customer environments

• The Impact You Will Have

  • Enable the world's leading semiconductor companies to tape out complex chips on schedule by resolving critical signoff bottlenecks that would otherwise delay product launches
  • Shape the evolution of industry-standard EDA tools by channeling real customer design challenges and requirements directly into Synopsys product roadmaps
  • Strengthen Synopsys' position as the trusted technical partner for advanced node design by delivering solutions that work under pressure and build long-term customer confidence
  • Accelerate customer adoption of the Seascape platform, helping design teams leverage big-data infrastructure to handle the scale and complexity of modern SoC verification and analysis
  • Reduce customer engineering cycles by creating reusable best practices, automation scripts, and documented workflows that solve recurring problems across multiple accounts
  • Expand Synopsys market reach by supporting sales teams with deep technical credibility during evaluations, competitive situations, and strategic account engagements
  • Build internal expertise across the Signoff Support Group by sharing knowledge, mentoring peers, and contributing to a culture where hard problems get solved collaboratively

• What You'll Need

  • 2+ years of hands-on experience in semiconductor design, with direct work in static timing analysis, timing closure, ECO implementation, or power distribution network analysis at block or SoC level
  • Proven ability to provide technical support or customer-facing engineering for timing signoff or power integrity domains, including troubleshooting tool issues and guiding design teams through complex analysis workflows
  • Working knowledge of at least two of the following tools: PrimeTime, RedHawk-SC, PrimeClosure, PTECO, Tweaker, or StarRC
  • Strong scripting and programming skills in Python, Tcl, Perl, or similar languages to automate workflows, parse large datasets, and build custom solutions for customer-specific challenges
  • Experience with PDN implementation, advanced node design flows, or 3DIC integration is a strong plus
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience in semiconductor design

• Who You Are

  • You can take a vague customer complaint like "timing is not closing" and within an hour of digging through reports, scripts, and constraints, identify whether it is a tool setup issue, a design problem, or a foundry model limitation
  • You are comfortable presenting technical content to a room full of senior engineers or architects, walking them through your analysis without oversimplifying or losing their trust
  • When a customer pushes back on a tool result or questions your recommendation, you do not get defensive, you dig deeper, validate your assumptions, and either stand by your answer with data or admit what you do not know and find out
  • You manage multiple customer issues in parallel without dropping threads, keeping internal stakeholders updated and ensuring nothing falls through the cracks even when priorities shift
  • You know when to escalate and when to solve it yourself, and you are not afraid to pull in a product engineer or an R&D team when a problem is beyond the scope of standard support
  • You treat internal knowledge sharing as part of the job, not an extra task, whether that means documenting a tricky workaround, running a lunch-and-learn, or helping a newer engineer debug their first PDN case

• The Team You'll Be Part Of

  Your recruiter will share more about the team structure and mission during the interview process.

  Rewards and Benefits

  We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.