ASIC Physical Design, Manager
Overview
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
Job Description
Category Engineering Hire Type Employee Job ID 10651 Remote Eligible No Date Posted 13/04/2025
Key Qualifications:
* Bachelor’s or master’s degree in electronics or electrical or computer or equivalent from reputed universities with 7-10 years’ experience in ASIC Physical design.
* In depth knowledge of end-to-end ASIC/SOC flow in submicron process nodes.
* Gate level and circuit level understanding of CMOS logic design.
* Strong Place & Route and Physical verification (DRC/LVS) skills
* Should be familiar with all stages of ASIC design flow including Synthesis, Timing analysis, Floor planning, Power planning, CTS, ECO flow, STA, Power analysis.
* Should be familiar with the Low power concepts & UPF/CPF format.
* Good understanding about Technology file, Liberty, Lef, Def, Gds & standard cells view generation process.
* Experience using Synopsys tools like ICC-II, FC, DC, PT, ICV. Having cadence and mentor tool knowledge would be advantage.
* Good communication, Interpersonal skills, Team player, Debugging and problem-solving skills.
* Ability to create diverse and inclusive environment while working with peers worldwide
Main Responsibilities:
* Managing a team of size 6-7 engineers
* Assigning tasks and following up with the team
* Building and validating the Place and Route (P&R) views and design supporting files (Via ladder, spacing constraints), using the latest RM (Reference methodology) flow accounting the foundry/architecture specific points
* Validating the P&R views by running automated and manual QA checks
* Validating the P&R views by taking it through the implementation (ICC2/FC/Innovus) and signoff flow (ICV,calibre )
* Working closely with India P&R design flow team for alignment of flow and library release
* Working closely with geographically distributed and cross-functional (Circuit Design, Layout, Characterization, Design Flow, Build-Validation and Testchip ) teams
* Supporting AE/field team on customer issues and queries by providing proper feedback in quick time.
* Continuously improving validation flows for quality and productivity.
* Supporting the technical documentation like databook and Application notes
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
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Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
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Time Away
In addition to company holidays, we have ETO and FTO Programs.
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Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
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Retirement Plans
Save for your future with our retirement plans that vary by region and country.
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Compensation
Competitive salaries.
** Benefits vary by country and region - check with your recruiter to confirm
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