We Are:

 At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

 The ideal candidate for this role is a passionate, self-motivated individual with a strong commitment to achieving high-quality results in a collaborative team environment. You are known for your ability to "get the job done" and have a solid foundation in electronics engineering, particularly in CMOS circuit design and device physics. You possess a basic understanding of layout and parasitic extraction, and you are familiar with the layout and circuit of digital CMOS designs. Your desire to learn and explore new technologies drives you to go the extra mile, and your strong research and problem-solving skills make you an invaluable asset to any team. Proficiency in English and effective communication skills are essential to your success in this role.

What You’ll Be Doing:

 * Designing Schematic/Layout of standard cells.
 * Defining and analyzing design specifications.
 * Creating test benches for simulating, verifying, and generating reports.
 * Collaborating with the layout team to share design constraints.
 * Working with the automation team to improve design flow.
 * Continuously learning and adapting to new technologies and methodologies.

The Impact You Will Have:

 * Advancing the development of cutting-edge standard cells for various processes.
 * Contributing to the efficiency and reliability of our IP solutions.
 * Enhancing the performance and quality of our chip designs.
 * Supporting the innovation of next-generation electronic devices.
 * Improving design workflows through automation and collaboration.
 * Driving technological advancements that impact the broader semiconductor industry.

What You’ll Need:

 * Bachelor’s or Master’s degree in Electronics Engineering.
 * Strong understanding of CMOS circuit design fundamentals and device physics.
 * Basic knowledge of layout and parasitic extraction.
 * Familiarity with digital CMOS design layouts and circuits.
 * Basic experience with SPICE simulations.
 * Proficiency in English.
 * Strong research and problem-solving skills.

Who You Are:

 * A self-starter with a passion for technology and innovation.
 * A collaborative team player with excellent communication skills.
 * Detail-oriented and committed to achieving high-quality results.
 * Adaptable and eager to learn new skills and technologies.
 * Proactive in identifying and solving problems.

The Team You’ll Be A Part Of:

 You will be part of a global development team focused on Logic Libraries IPs, specifically in developing standard cells for various processes. The team is dedicated to innovation and excellence, working collaboratively to push the boundaries of what is possible in chip design. Your contributions will be vital in achieving the team’s goals and driving the success of Synopsys' IP solutions.

Rewards and Benefits:

 We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.