Job Title: Software Engineering Internship – LLM-driven Engineering Analysis

Category Interns/Temp Hire Type Intern Job ID 17390 Remote Eligible No Date Posted 05/09/2026

Job Title: Software Engineering Internship – LLM-driven Engineering Analysis

We Are:

Drive technology innovations that shape the way we live and connect. Our technology drives the Era of Pervasive Intelligence, where smart tech and AI are seamlessly woven into daily life. From self-driving cars and health-monitoring smartwatches to renewable energy systems that efficiently distribute clean power, Synopsys creates high-performance silicon chips that help build a healthier, safer, and more sustainable world.

Internship Experience:

At Synopsys, interns dive into real-world projects, gaining hands-on experience while collaborating with our passionate teams worldwide—and having fun in the process! You'll have the freedom to share your ideas, unleash your creativity, and explore your interests. This is your opportunity to bring your solutions to life and work with cutting-edge technology that shapes not only the future of innovation but also your own career path. Join us and start shaping your future today!

What You'll Be Doing:

- Explore and prototype AI-assisted approaches to improve understanding and analysis of RTL and related engineering data.

- Develop Python-based tooling to process, correlate, and analyze structured engineering data (e.g., RTL, logs, traces, JSON).

- Apply and evaluate LLM-based and algorithm-based methodologies for analyzing complex engineering artifacts.

- Design experiments to compare solution accuracy, quality, and practical usability.

- Analyze variations in engineering artifacts using automated analysis techniques to extract meaningful insights.

- Build hybrid workflows combining AI and deterministic algorithms to improve robustness and explainability.

- Document findings and present clear technical reports with insights and recommendations.

What You'll Need:

Required:

- Currently pursuing a Bachelor's or Master’s degree in Computer Science, Electrical Engineering, or a related field.

- Solid understanding of RTL design or digital design fundamentals.

- Strong Python programming skills.

- Familiarity with LLMs or AI tools (prompting, agents, or using AI for engineering tasks).

- Ability to independently explore problems, run experiments, and analyze results.

Nice to Have:

- Background in SystemVerilog, simulation, or verification methodologies (e.g., UVM).

- Familiarity with EDA tools or flows (simulation, acceleration, or emulation).

- Experience analyzing RTL structures, execution traces, or complex log data.

- Understanding of relationships between low-level implementations and overall system behavior.

- Experience with large-scale data analysis, benchmarking, or experimental design.

Key Program Facts:

Program Length: 8 Weeks

Location: Hsinchu (X-Plan), Taiwan

Working Model: In-office

Full-Time/Part-Time: Full-Time preferred

Start Date: July 2026

Equal Opportunity Statement:

Synopsys is committed to creating an inclusive workplace and is an equal opportunity employer. We welcome all qualified applicants to apply, regardless of age, color, family or medical leave, gender identity or expression, marital status, disability, race and ethnicity, religion, sexual orientation, or any other characteristic protected by local laws. If you need assistance or a reasonable accommodation during the application process, please reach out to us.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.