Seeking a highly motivated, innovative and independent ASIC/firmware digital verification engineer intern.

Working as part of a highly experienced mixed-signal design team, the candidate will be involved

in verifying current and next generation Backplane Ethernet, PCIe, SATA, and USB SERDES

products. The position offers an excellent opportunity to work with an expert team of digital and

mixed signal engineers responsible for delivering high-end mixed-signal designs from

creating testplans to performing functional and performance tests and closing coverages on the test-chips/products.

Ideally, Looking for a 12-16 month commitment starting in January/May 2025,  based out of our Markham office.

8 month internship will be considered (Mississauga office will be considered as well)

Skills required:

-Solid understanding of digital circuit design

-Basic understanding of C/C++ and RISC processors

-Hands-on experience in writing testcases in Verilog and System Verilog

-Familiarity with scripting languages (Python or Perl) and working in Linux environment

Skills desired:

-Knowledge of high-speed digital & mixed-signal design

-Familiarity with industry digital verification methodology such as VMM/UVM

-Familiarity with version control systems (GIT/SVN/Perforce)

-Good organization and communication skills for interacting with teammates 

Responsibilities of this job include:

-Creating and updating test plans and test cases

-Writing modular constrained-random/coverage driven Verilog, SystemVerilog

and UVM/VMM testbenches

-Writing SystemVerilog assertions

-Maintaining simulation regressions and debugging RTL and Gate level simulation failures

-Writing functional coverage and performing functional/code/assertion coverage analysis

-Tracking issues in Jira and documenting in Confluence

Applicants must be currently enrolled in accredited institution to be eligible for an internship.

The Solutions Group high-quality, silicon-proven semiconductor IP solutions for SoC designs. The Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors, and subsystems. To accelerate IP integration, software development, and silicon bring-up, Synopsys’ IP Accelerated initiative provides architecture design expertise, pre-verified and customizable IP subsystems, hardening, signal/power integrity analysis, and IP prototyping kits. Synopsys' extensive investment in IP quality, comprehensive technical support, and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.