ASIC Digital Design, Staff Engineer
Overview
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
Job Description
About us
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security.
If you share our passion for innovation, we want to meet you. Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
Seeking a highly motivated and innovative design engineer with background in high-speed protocols. Working as part of an experienced digital design and verification team. The position offers an excellent opportunity to work with experts on several fields. The candidate will be involved at specify, design and implement phases of state-of-the-art products.
Key responsibilities:
* Study standard specifications published by JEDEC;
* Define micro architecture at block level based on IP architecture;
* Work on RTL design based on predefined coding style, SVA is included;
* Clean RTL check violations in lint, CDC, DFT and synthesis;
* Run block level test to speed up IP verification;
* Work with verification to debug and fix RTL issues;
* Check synthesis timing and improve RTL design if required;
Required Skills:
* Around 5 years of relevant IP design experience;
* Desire to learn and explore new technologies;
* Demonstrates good investigation and problem-solving skills;
* Be familiar with IP design flow and good at RTL design
* Solid RTL debug capability;
* Knowledge in HBM/DDR and interface technologies such as UCie, PCIe, USB is a plus;
* Knowledge in FrontEnd and/or BackEnd synthesis is a plus;
Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
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Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
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Time Away
In addition to company holidays, we have ETO and FTO Programs.
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Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
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Retirement Plans
Save for your future with our retirement plans that vary by region and country.
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Compensation
Competitive salaries.
** Benefits vary by country and region - check with your recruiter to confirm
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