As an intern at Synopsys, you will have the opportunity to gain hands-on experience while working alongside industry professionals. You will build and refine skills relevant to your major and future career. The Synopsys intern program emphasizes integrating our interns, allowing you to work hand-in hand with mentors and colleagues on your team. Your contributions will be invaluable to the company and products, guaranteeing you a fulfilling internship that you can proudly bring back to your courses.

This internship in is Full Time (40 hours/week), and last for the duration of 8 to 16 months. Ideally looking for a January start date.

What you'll learn and do:
Seeking a highly motivated and innovative digital design engineer intern. Working as part of a highly experienced mixed-signal design team, the candidate will be involved in designing and verifying current and next generation Backplane Ethernet, PCIe, SATA, and USB 2/3 SERDES products. The position offers an excellent opportunity to work with skilled team of digital and mixed signal engineers responsible for delivering high-end mixed-signal designs from specification development to performing functional and performance tests on the test-chips.

Requirements:
Hands-on experience in writing Verilog or VHDL
Understanding of high-speed digital & mixed-signal design is an advantage
Hands on FPGA design and verification experience is an add
Good organization and communication skills for interacting between different design groups and customer support teams

Assets:
Familiar with UVM methodology
Familiar with code quality metrics
Familiar with SystemVerilog

Skill Requirements:
Familiar with ASIC design with Verilog/SystemVerilog or VHDL
Familiar with ASIC design/verification flow 
Good teamwork