R&D Engineering, Staff Engineer

Category Engineering Hire Type Employee Job ID 17692 Remote Eligible No Date Posted 06/16/2026

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You bring substantial experience in design verification where precision and thoroughness directly impact product success. You understand that comprehensive verification requires anticipating failure modes, identifying edge cases, and ensuring designs perform reliably under all specified conditions. Your approach combines technical rigor with systematic problem-solving.

You have worked in Silicon Lifecycle Management or adjacent domains where digital, analog, and mixed signal verification converge. When confronted with test failures, you apply structured debugging methodologies, analyzing waveforms, reviewing testbench architecture, and distinguishing between design issues and verification artifacts. Your diagnostic skills have consistently prevented critical issues from reaching production.

You are effective in customer-facing technical roles, translating reported issues into reproducible test cases and providing clear technical explanations. You maintain awareness of industry developments in SLM and verification methodologies. At Synopsys, you will contribute to verification efforts that support products used by leading semiconductor companies, working within an established engineering organization that values technical excellence.

What You'll Be Doing

• Design and implement verification environments for Silicon Lifecycle Management products, developing comprehensive test cases that validate functionality and identify defects
• Perform root cause analysis on complex verification failures across digital, analog, and mixed signal domains using simulation tools and waveform analysis
• Collaborate with customers and internal engineering teams to investigate technical issues, reproduce reported problems, and verify resolution effectiveness
• Develop and maintain automated regression test suites that ensure product quality as features evolve and expand
• Utilize EDA tools within Unix/Linux environments to support verification workflows and process automation
• Monitor developments in SLM technologies and 3D-IC standards, incorporating relevant advancements into verification practices

The Impact You Will Have

• Ensure the quality and reliability of SLM products deployed by major semiconductor manufacturers, reducing risk of costly design iterations
• Contribute to shorter development cycles by identifying and resolving critical defects during verification phases
• Enhance team capability by documenting effective debugging approaches and verification strategies
• Support customer success by providing timely and accurate technical analysis that maintains project schedules
• Improve verification efficiency by recommending and implementing process enhancements and tooling improvements
• Advance semiconductor development by validating IP and lifecycle management solutions that enable complex chip designs

What You'll Need

• Bachelor's or Master's degree in Computer Science or Electrical Engineering with a minimum of 4 years of professional experience in design verification
• Demonstrated proficiency with EDA tools and Unix/Linux operating systems for verification and simulation tasks
• Strong analytical and debugging capabilities with a track record of resolving complex technical issues
• Effective written and verbal communication skills in English for technical documentation and cross-functional collaboration
• Experience with digital, analog, or mixed signal IP and circuit design is highly valued
• Knowledge of 3D-IC standards and advanced packaging verification methodologies is beneficial

Who You Are

• You apply systematic and thorough approaches to verification, ensuring comprehensive coverage of design specifications
• You employ methodical debugging techniques, examining evidence carefully and validating hypotheses before drawing conclusions
• You communicate technical information clearly to diverse audiences, adapting your explanations to the technical level of stakeholders
• You manage multiple concurrent verification activities effectively, maintaining organization and providing regular status updates
• You work productively in situations with incomplete information, asking clarifying questions and making informed decisions

The Team You'll Be Part Of

You will join a verification engineering team focused on Silicon Lifecycle Management products, working alongside professionals in IP design, EDA development, and customer support. The team operates in a global environment addressing verification challenges across multiple signal domains. Your recruiter will provide additional details regarding team composition, current initiatives, and organizational structure during the interview process.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.